Organic Package Substrate Layout for Long-Reach Chiplet Links
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Solution Overview
Problem
Current systems-in-package architectures face limitations in integrating a large number of circuit elements due to size constraints of silicon interposers and complex communication wire routing, which restricts communication bandwidth and increases power consumption.
Innovation Solution
A physical layer interconnect using an organic package substrate that enables high-bandwidth communication between chiplets with low power requirements, allowing for a larger number of chiplets to be integrated without the need for silicon interposers, by employing a separate chiplet to interface with the physical interconnect or a logic die with an embedded physical interconnect interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If silicon interposers are used to integrate chiplets, then communication bandwidth between chiplets is improved, but the size of the interposer increases and power consumption increases
Solution Approach 1:
The patent introduces an organic substrate as an intermediary carrier to replace the traditional silicon interposer. This organic substrate serves as the mediating structure that connects multiple chiplets, enabling communication while avoiding the size and power constraints of silicon interposers. The organic substrate acts as a mediator that facilitates high-bandwidth communication without requiring large physical dimensions.
Solution Approach 2:
The patent changes the material parameter from silicon to organic substrate, which fundamentally alters the physical and electrical characteristics of the interposer. This parameter change enables longer signal reach and reduced power consumption while maintaining or improving communication bandwidth. The organic material properties allow for different trace geometries and signal propagation characteristics that resolve the contradiction between bandwidth and size.
2Productivity
If silicon interposers are used to integrate chiplets, then communication bandwidth between chiplets is improved, but power consumption increases
Solution Approach 1:
The organic substrate serves as an energy-efficient intermediary for signal transmission. Unlike silicon interposers that require high power for long-reach signaling, the organic substrate enables lower power consumption through its inherent electrical properties and optimized trace designs. The intermediary structure reduces signal loss and eliminates the need for complex equalization circuits, thereby reducing overall power consumption while maintaining high bandwidth.
Solution Approach 2:
Changing the substrate material from silicon to organic material fundamentally changes the energy parameters of the system. The organic substrate exhibits different electrical resistance, capacitance, and signal attenuation characteristics that reduce power consumption. This parameter change allows for energy-efficient high-bandwidth communication without the power overhead associated with silicon interposers.
3Adaptability or versatility
If the number of chiplets integrated is increased, then system complexity is improved, but routing complexity and power consumption increase when using silicon interposers
Solution Approach 1:
The organic substrate provides a universal platform that can accommodate any number and configuration of chiplets without requiring different routing strategies. The substrate serves multiple functions simultaneously: mechanical support, electrical interconnection, and signal routing. This multi-functionality simplifies the integration process and reduces routing complexity regardless of the number of chiplets, enabling scalable system complexity without proportional increases in routing difficulty.
Data Source
AI summary
A multi-chip module (MCM) includes a common substrate and first and second integrated circuit (IC) chips disposed on the common substrate. The first integrated circuit (IC) chip includes a first interface circuit disposed proximate a first edge of the first IC chip and a second interface circuit disposed proximate the first edge of the first IC chip. A first chiplet couples to the first interface circuit via a first link. A second chiplet couples to the second interface circuit via a second link. A first position of the first chiplet with respect to the first IC chip is staggered in a longitudinal dimension relative to a second position of the second chiplet with respect to the first IC chip.