Organic Substrate Via Stacking for Semiconductor Modules
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Solution Overview
Problem
Conventional semiconductor devices face challenges in achieving reliable vertical stacking of LSI chips of different sizes due to positional deviations during resin sealing, high assembly costs in POP structures, and increased manufacturing costs with TSV structures, which limit their applicability and scalability.
Innovation Solution
A semiconductor device with an organic substrate featuring through vias, metal thin film wiring layers, and external electrodes, allowing for vertical stacking without pre-patterning of the substrate and enabling easy connection of LSI chips of varying sizes, while simplifying the production process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If resin sealing is used to bond semiconductor elements on a supporting plate, then assembly is simplified and productivity is improved, but positional deviation occurs between via sections and electrode pads due to resin contraction, reducing connection reliability
Solution Approach 1:
An organic substrate is introduced as an intermediary component between the supporting plate and semiconductor elements. The organic substrate includes through-holes with conductive sections that serve as stable positioning features, mediating the connection between the supporting plate and semiconductor elements while preventing positional deviation caused by resin contraction.
Solution Approach 2:
The organic substrate is prepared in advance with through-holes and conductive sections formed before semiconductor element bonding. This preliminary preparation ensures that positioning features are already in place, allowing semiconductor elements to be accurately positioned and bonded without subsequent positional deviation.
2Adaptability or versatility
If Through Silicon Via (TSV) structures are used to enable vertical stacking, then adaptability for stacking different chip sizes is improved, but manufacturing complexity and costs increase
Solution Approach 1:
The structure is segmented into distinct functional components: the organic substrate with through-holes, conductive sections within through-holes, and separate semiconductor elements. This segmentation allows each component to be manufactured and prepared independently, then assembled together, reducing overall manufacturing complexity while maintaining stacking adaptability.
Solution Approach 2:
The organic substrate with through-holes and conductive sections serves multiple functions: it provides mechanical support, enables electrical connection between stacked chips, and facilitates positioning of semiconductor elements. This multi-functionality reduces the need for additional specialized components, simplifying manufacturing while maintaining versatility for stacking different chip sizes.
3Adaptability or versatility
If Package on Package (POP) structures are used for vertical stacking, then adaptability for different chip sizes is improved, but assembly costs increase
Solution Approach 1:
Multiple functions are merged into the organic substrate: mechanical support, electrical connection pathways through conductive sections, and positioning features via through-holes. This consolidation reduces the number of separate components and assembly steps required, lowering assembly costs while maintaining adaptability for stacking different chip sizes.
Data Source
AI summary
A method of manufacturing a semiconductor device having an insulating substrate, a semiconductor element which is mounted on one main surface of the insulating substrate via adhesive, with an element circuit surface of the semiconductor element facing upwards, a first insulating material layer (A) which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto, a first metal thin film wire layer provided on the first insulating material layer (A) and a portion of which is exposed to an external surface, a first insulating material layer (B) provided on the first metal thin film wire layer, a second insulating material layer provided on a main surface of the insulating substrate where the semiconductor element is not mounted, a second metal thin film wire layer provided inside the second insulating material layer.


