Oriented Crystal Nanowire Interconnects for Resistivity Control
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Solution Overview
Problem
The resistivity size effect in nanoscale wires used as interconnects in semiconductor devices leads to increased electrical resistivity, causing signal delays, which existing technologies have not adequately addressed due to surface and grain boundary scattering mechanisms.
Innovation Solution
The use of oriented-crystal nanowires, particularly tungsten (W) wires, is proposed, where the crystals are oriented to exhibit anisotropic scattering processes, reducing line resistivity in specific crystallographic orientations and mitigating the resistivity size effect, thereby reducing signal delays in semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If nanoscale wires are used as interconnects in semiconductor devices, then device integration density is improved, but electrical resistivity increases due to surface and grain boundary scattering
Solution Approach 1:
The patent applies local quality by controlling the crystallographic orientation of grains within the nanoscale wire. Specifically, it promotes the formation of grains with <100> orientation along the wire length, which exhibits lower electrical resistivity compared to other orientations. This localized control of crystal structure quality allows the wire to maintain low resistivity despite its nanoscale dimensions and the associated surface scattering effects.
Solution Approach 2:
The patent changes the physical parameter of crystallographic orientation to mitigate resistivity increase. By adjusting the grain orientation distribution through controlled deposition conditions and thermal processing, the patent transforms the electrical transport properties of the material. The <100> oriented grains provide a preferred conduction path with reduced scattering, effectively changing the electrical resistance parameter of the nanoscale interconnect.
2Length of moving object
If wire dimension is reduced to increase integration density, then device scaling is improved, but signal delay increases due to resistivity size effect
Solution Approach 1:
The patent addresses signal delay by ensuring that the nanoscale wire maintains high electrical quality through controlled <100> crystallographic orientation. This local quality control in the crystal structure reduces electron scattering at grain boundaries and surfaces, thereby maintaining faster electron transport and reducing signal propagation delay despite the reduced wire dimensions.
Solution Approach 2:
The patent changes the crystallographic orientation parameter to optimize electrical transport properties at nanoscale dimensions. The <100> orientation provides reduced scattering cross-section for charge carriers, effectively changing the mean free path and mobility parameters, which directly impacts signal propagation speed and reduces time delay in scaled interconnects.
3Ease of manufacture
If conventional polycrystalline wires are used, then manufacturing simplicity is maintained, but anisotropic scattering causes increased resistivity in narrow wires
Solution Approach 1:
The patent improves upon conventional polycrystalline wires by introducing local quality control through preferred <100> crystallographic orientation. Rather than accepting random grain orientations in conventional polycrystalline materials, the patent employs controlled deposition and thermal processing to create a non-random, orientation-specific grain structure that optimizes electrical transport while remaining compatible with existing manufacturing workflows.
Solution Approach 2:
The patent changes the crystallographic orientation distribution parameter from random (conventional polycrystalline) to preferentially <100> oriented. This parameter change is achieved through controlled sputtering conditions and thermal annealing, transforming the microstructural parameters of the deposited film to achieve lower resistivity while using standard manufacturing equipment and processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
A significant reduction in resistivity size effect severity is achieved, with a factor of two reduction in incremental resistivity observed in certain orientations, demonstrating the effectiveness of anisotropic scattering in minimizing signal delays in electronic devices.
Implementation Method 1
the crystals are oriented to exhibit anisotropic scattering processes whereby line resistivity in one crystallographic orientation becomes lower than the resistivity in other orientations
Data Source
AI summary
Interconnects for semiconductors formed of materials that exhibit crystallographic anisotropy of the resistivity size effect such that line resistivity in one crystallographic orientation becomes lower than the resistivity in the other directions and methods of fabrication and use thereof are described. A wire having a dimension that results in an increase in the electrical resistivity of the wire can be formed of a material with a conductive anisotropy due to crystallographic orientation relative to the direction of current flow that minimizes the increase in the electrical resistivity as compared to the other orientations at that dimension.