Orthogonal Array Antenna Reception With Reduced ADC Count
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Solution Overview
Problem
Existing phased array antenna systems face increased complexity and power consumption as the number of antenna elements grows, necessitating more analog-to-digital converters (ADCs), which is inefficient in terms of power, volume, and weight.
Innovation Solution
A system that generates orthogonal, frequency-shifted, or coded signals for each antenna element, which are then multiplied and summed before being converted by a reduced number of ADCs, allowing for processing with a single or fewer digital signals, thereby reducing the number of ADCs required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of antenna array elements increases, then the signal processing capability and array performance improve, but the number of ADCs increases leading to higher power consumption and system complexity
Solution Approach 1:
The patent combines multiple antenna element signals into a single composite analog signal through summation before digitization. This merging approach allows multiple antenna elements to be processed using only one ADC, thereby maintaining signal processing capability while dramatically reducing system complexity and power consumption compared to having one ADC per antenna element.
Solution Approach 2:
The patent introduces orthogonal modulation as an additional dimension to separate multiple antenna signals. By modulating each antenna signal with a unique orthogonal code in the analog domain before summation, the system maintains the ability to distinguish and process individual antenna signals after they have been combined, effectively adding a separation dimension without requiring separate ADCs.
2Adaptability or versatility
If the number of antenna array elements increases, then the signal processing capability improves, but the power consumption increases linearly due to more ADCs
Solution Approach 1:
The patent merges multiple antenna signals into a single composite signal that is then digitized by one ADC. This combining approach maintains the processing of all antenna elements while reducing power consumption from N ADCs to just one ADC, directly addressing the linear power consumption problem.
Solution Approach 2:
The patent replaces the traditional approach of using multiple ADCs (electronic/digital system) with an analog signal processing approach using orthogonal modulation and summation. This substitution eliminates the need for multiple high-power ADCs, dramatically reducing overall system power consumption while maintaining signal processing capability.
3Adaptability or versatility
If the number of antenna array elements increases, then the signal processing capability improves, but the power consumption and volume increase due to more ADCs
Solution Approach 1:
The patent combines multiple antenna element signals into a single composite analog signal through summation before digitization. This merging approach allows multiple antenna elements to be processed using only one ADC, thereby maintaining signal processing capability while dramatically reducing power consumption and physical volume compared to having one ADC per antenna element.
Solution Approach 2:
The patent makes a single ADC perform the function of multiple ADCs by using orthogonal modulation to encode multiple antenna signals into one composite signal. This multi-functional approach allows one ADC to process signals from all antenna elements, reducing both the quantity of components and overall system volume.
Data Source
AI summary
A system for receiving signals from an array antenna that includes a first number of antenna elements, including an orthogonal signals generator module configured to generate the first number of orthogonal signals. Plurality of multipliers configured to receive array antenna element analog signals and the first number of orthogonal signals and generate a corresponding multiplied analog signal, giving rise to a first number of multiplied analog signals. A second number of summation modules configured to receive the first number of multiplied analog signals from the multipliers and generate a second number of summed analog signals. A second number of analog to digital converters configured to receive the summed analog signals and generate the second number of summed digital signals. The summed digital signals are capable of being fed to a digital processor for generating a processed signal of the array antenna, wherein the second number falls in the range of 1 to less than the first number.