Orthogonal Bridge Packaging for TSV-Free Chip Stack Cooling
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Solution Overview
Problem
Current silicon bridge technology is inadequate for enabling various heterogeneous integration architectures, including chip stacks, as it cannot eliminate through-silicon vias and lacks efficient thermal management.
Innovation Solution
The use of orthogonal bridges, fabricated from materials like silicon, silicon carbide, or diamond, positioned orthogonal to the substrate, which connect chip stacks without through-silicon vias and include a heat spreader for efficient thermal management, allowing for the assembly of chip stacks using hybrid or thermal compression bonding and underfilling to minimize thermal expansion mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current silicon bridge technology is used to connect chips, then chip interconnection is achieved, but through-silicon vias cannot be eliminated and thermal management is inefficient
Solution Approach 1:
The patent transitions from planar horizontal bridges to three-dimensional vertical orthogonal bridges that extend upward from the substrate to contact chip side surfaces. This dimensional change eliminates the need for through-silicon vias while enabling direct electrical and thermal contact with chip edges, thereby simplifying the overall device structure while maintaining interconnection functionality.
Solution Approach 2:
The orthogonal bridge serves as an intermediary structure that simultaneously provides electrical interconnection and thermal management pathways. By positioning the bridge to contact the side surface of chips, it mediates both signal transmission and heat dissipation without requiring through-silicon vias, thus resolving the contradiction between interconnection capability and structural complexity.
2Reliability
If through-silicon vias are used in chip stacks, then electrical connection is achieved, but fabrication complexity and cost increase
Solution Approach 1:
The patent extracts the electrical connection function from the traditional through-silicon via approach and relocates it to the orthogonal bridge structure that contacts chip side surfaces. This extraction eliminates the need for complex TSV fabrication processes while maintaining reliable electrical connection, thereby improving ease of manufacture.
Solution Approach 2:
Instead of creating vertical connections through the substrate (TSVs), the patent inverts the approach by having the substrate generate upward-extending orthogonal bridges that contact chip side surfaces. This inversion simplifies the manufacturing process by eliminating TSV-related complexity while achieving the same electrical connection objective.
3Reliability
If conventional horizontal bridge technology is used, then chip connection is achieved, but thermal management efficiency is reduced
Solution Approach 1:
The patent introduces vertical orthogonal bridges that extend upward from the substrate to contact chip side surfaces, creating a three-dimensional thermal management architecture. This dimensional change enables direct thermal contact with chip edges and allows heat spreaders to be positioned closer to heat-generating components, significantly improving thermal management efficiency compared to conventional horizontal bridge approaches.
Solution Approach 2:
The orthogonal bridge structure merges electrical interconnection and thermal management functions into a single integrated component. By contacting chip side surfaces, the bridge simultaneously conducts electrical signals and dissipates heat, eliminating the need for separate thermal management structures and improving overall thermal management efficiency while maintaining chip connection functionality.
4Adaptability or versatility
If chip stacks are assembled with thermal expansion mismatch, then integration is achieved, but structural stability deteriorates
Solution Approach 1:
The patent applies underfill material specifically in the regions between chips and between chips and the substrate, providing localized structural support and thermal expansion compensation. This local quality approach maintains structural stability in critical areas while preserving the overall integration capability of the chip stack assembly.
Solution Approach 2:
The underfill material serves as a pre-applied cushioning layer that compensates for thermal expansion mismatch before operational thermal cycles begin. By positioning the underfill between chips and substrate, it provides beforehand protection against structural instability caused by differential thermal expansion, thereby maintaining structural stability while enabling heterogeneous integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient thermal management and eliminates the need for through-silicon vias, improving fabrication efficiency and reducing costs by allowing for thicker chip stacks and flexible integration architectures, including heterogeneous integration with improved thermal solutions.
Implementation Method 1
a heat spreader positioned in direct contact with at least one of the first chip package, the second chip package, or the orthogonal bridge
Implementation Method 2
bonding the plurality of stacked chips together
Implementation Method 3
underfilling to minimize thermal expansion mismatch
Data Source
AI summary
A package structure includes a substrate having an upper surface; a first chip package positioned on the upper surface of the substrate, the first chip package comprising a first chip having a first integrated circuit connected to a first redistribution layer; a second chip package positioned on the upper surface of the substrate, the second chip package comprising a second chip having a second integrated circuit connected to a second redistribution layer; an orthogonal bridge positioned between the first chip package and the second chip package and having an interconnection to the first redistribution layer and the second redistribution layer; and a heat spreader positioned in direct contact with at least one of the first chip package, the second chip package, or the orthogonal bridge. The orthogonal bridge is arranged substantially orthogonal to the upper surface of the substrate.