Orthogonal-Function Calibration for Mixed-Signal Nonlinearity Compensation

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Solution Overview

Problem

Non-linearity in mixed-signal ICs, particularly in ΔΣ DACs and ΔΣ FN-PLLs, limits their performance by causing noise and distortion, which cannot be effectively removed by simple filters, and existing compensation techniques are inadequate for high-performance applications.

Innovation Solution

An adaptive non-linearity identification and compensation scheme using orthogonal kernels and the Least Mean Square (LMS) method to accurately represent and compensate for non-linearity in circuit blocks, allowing for robust performance across Process, Supply, and Temperature (PVT) variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multi-bit DAC is used to reduce quantization noise, then bandwidth is improved, but linearity deteriorates due to mismatch between DAC unit cells

Engineering Contradiction:
ImprovebandwidthVSAvoidlinearity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The multi-bit DAC is segmented into multiple unit cells, each contributing to the overall output. By dividing the DAC into smaller functional units, the patent enables independent optimization of each cell while maintaining overall system performance. This segmentation allows the system to achieve high bandwidth through parallel operation while managing linearity through controlled matching requirements of individual cells.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If segmented DAC architecture is used to improve matching, then linearity is improved, but device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidDAC architecture complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the segmentation approach with shared resource utilization. Multiple DAC unit cells share common control logic, timing circuits, and calibration mechanisms, thereby reducing overall device complexity while maintaining the linearity benefits of segmentation. This combining strategy allows the system to achieve improved matching without proportionally increasing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs parameter changes through calibration techniques that adjust operating conditions of DAC unit cells. By dynamically modifying control parameters such as switching timing, reference voltage levels, or cell activation patterns, the system optimizes matching between cells to improve linearity without requiring complex hardware modifications.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If non-linearity compensation is implemented, then SNDR and SFDR are improved, but device complexity increases

Engineering Contradiction:
ImproveSNDR and SFDRVSAvoidcompensation circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements non-linearity compensation through feedback mechanisms that measure actual DAC output and adjust control signals accordingly. By continuously monitoring performance metrics and applying corrective feedback to DAC unit cells, the system improves SNDR and SFDR while using relatively simple feedback circuits compared to complex pre-compensation architectures.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent enables the DAC system to perform self-calibration and self-correction of non-linearities. Through built-in test modes and automatic calibration routines, the DAC units identify and compensate for their own matching errors without requiring external complex compensation circuits, thereby improving performance while minimizing additional device complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10707883B2Adaptive non-linearity identification and compensation using orthogonal functions in a mixed signal circuit
Publication Date: 2020.07.07 SI WARE SYSTEMS SAE
  • US10707883B2 patent drawing
  • US10707883B2 patent drawing
  • US10707883B2 patent drawing

AI summary

A feedback divider in a mixed-signal circuit is modulated by a frequency control word controlling a delta-sigma modulator. An accumulated quantization error from the delta-sigma modulator is compared to a residual error in the circuit by a Least-Mean Square (LMS) correlator for gain calibration to adjust for linear errors. Upper bits of the accumulated quantization error access a lookup table to find two outputs of the compensation function that are interpolated between using lower bits of the accumulated quantization error. The interpolated result is an adjustment subtracted from the loop to compensate for non-linear errors. A set of orthogonal kernels is generated from the accumulated quantization error and calibrated using another LMS correlator and inverse transformed to generate updates to the non-linear compensation function in the lookup table. The kernels can be Walsh Hadamard (WH) and the inverse transformer an inverse WH transformer.