Orthogonal Trench Electrodes in Semiconductor Devices
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Solution Overview
Problem
The alignment of trenches with different depth dimensions for trench gate and field plate electrodes in semiconductor devices is challenging, affecting productivity due to the need for precise alignment of long and short depth trenches.
Innovation Solution
The semiconductor device design features trenches with short and long depth dimensions that intersect orthogonally, allowing for separate formation without considering alignment accuracy between them, enabling independent configuration of optimal pitch dimensions for trench gate and source electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If trenches with different depth dimensions are separately formed for trench gate and field plate electrodes, then optimal pitch dimensions for each electrode can be achieved, but alignment difficulty increases and productivity decreases
Solution Approach 1:
The patent combines the formation of trenches for trench gate electrodes and field plate electrodes into a single simultaneous etching process. By using a unified mask pattern that defines both trench types, the patent eliminates the need for separate alignment steps while maintaining optimal pitch dimensions for each electrode type. This merging of processes directly resolves the contradiction by improving productivity without sacrificing manufacturing precision.
Solution Approach 2:
The patent creates a universal mask pattern that serves multiple functions: it defines both short-depth trenches for trench gate electrodes and long-depth trenches for field plate electrodes simultaneously. This multi-functional mask design allows a single patterning and etching process to achieve what previously required multiple separate processes, thereby resolving the productivity issue while maintaining precise pitch control for both electrode types.
2Manufacturing precision
If trenches with different depth dimensions are separately formed for trench gate and field plate electrodes, then optimal pitch dimensions for each electrode can be achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges multiple manufacturing steps (separate mask formation, separate alignment, separate etching) into a single integrated process. By combining these operations, the patent reduces manufacturing process complexity while maintaining the ability to achieve optimal pitch dimensions for both trench gate and field plate electrodes through the unified mask design.
Solution Approach 2:
The unified mask pattern performs multiple functions simultaneously: it patterns both short and long trenches, serves as the alignment reference for both electrode types, and defines the pitch for both structures. This multi-functionality eliminates the need for multiple specialized process steps, thereby reducing manufacturing complexity while preserving pitch precision.
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a first semiconductor layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer is a first conductivity type. The second semiconductor layer is provided in a surface region of the first semiconductor layer and is the first conductivity type. The first electrode is provided inside a first trench extending in the first direction and opened to a surface of the second semiconductor layer. The second electrode is provided in a second trench extending in a second direction crossing the first direction and opened to the surface of the second semiconductor layer. A dimension from the surface of the second semiconductor layer to a lower end of the second electrode is shorter than a dimension from the surface of the second semiconductor layer to a lower end of the first electrode.


