OS-Level Dynamic Address Space Mirroring for Memory Redundancy
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing information handling systems lack continuous memory redundancy, availability, and serviceability, as most approaches provide only finite protection against memory faults and do not support memory mirroring at a hardware level.
Innovation Solution
Implementing dynamic address space mirroring at the operating system level, where address spaces for data associated with processes are reallocated from a first address space to a second responsive to a threshold of correctable bit errors, ensuring continuous protection and redundancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing memory protection approaches are used, then finite protection from memory faults is provided, but continuous protection is not achieved
Solution Approach 1:
The system performs preliminary actions by proactively monitoring memory health metrics (correctable error counts, uncorrectable error status, capacity utilization) and reallocating address spaces before failures occur. The OS-level mirroring is established in advance, and when thresholds are approached, the system preemptively remaps address spaces to healthy memory regions, ensuring continuous protection without waiting for actual failures.
Solution Approach 2:
The patent implements continuous protection through persistent OS-level address space mirroring that operates throughout the system's operational lifetime. Unlike finite protection schemes that require periodic reconfiguration or have limited error correction attempts, this system maintains continuous monitoring and dynamic reallocation capabilities, ensuring uninterrupted protective action as long as healthy memory capacity exists.
2Reliability
If hardware-level memory mirroring is implemented, then memory redundancy is provided, but processor and chipset support is required
Solution Approach 1:
The patent substitutes hardware-level mirroring mechanisms with an OS-level software implementation. Instead of requiring processor and chipset hardware support for memory mirroring, the system uses OS kernel capabilities to create and manage virtual address space mappings. This software-based approach achieves equivalent redundancy functionality without dependency on specific hardware capabilities, reducing device complexity requirements.
Solution Approach 2:
The OS-level address space mirroring mechanism provides universal compatibility across different processor architectures and chipset implementations. By operating at the OS layer rather than hardware layer, the solution can be deployed on various platforms without requiring specialized hardware support, making the memory redundancy capability universally applicable across diverse information handling systems.
3Reliability
If address spaces are statically allocated for mirroring, then memory redundancy is established, but adaptability to memory failures is reduced
Solution Approach 1:
The system implements dynamic address space allocation where the OS continuously monitors memory health metrics and automatically remaps address spaces in response to changing conditions. When correctable error counts exceed thresholds or uncorrectable errors occur, the system dynamically identifies alternative healthy memory regions and reallocates address spaces accordingly. This dynamic behavior enables the system to adapt to various failure scenarios and optimize redundancy utilization based on real-time memory status.
Data Source
AI summary
An information handling system may include one or more processors, a memory system communicatively coupled to the one or more processors, and a program of instructions embodied in non-transitory computer readable media and configured to, when read and executed by the one or more processors, create operating system level-mirroring of address spaces for data associated with one or more processes executing on the one or more processors and dynamically reallocate address spaces used for mirroring of the data for a process of the one or more processes from a first address space to a second address space responsive to a determination that a number of correctable bit errors of a memory page associated with the first address space exceeds a threshold.