OS Scheduler Shielded State for Processor Core Thermal Management

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing operating system schedulers do not effectively account for energy efficiency and thermal management when scheduling tasks among heterogeneous processor cores, leading to inefficient power consumption and potential component damage due to excessive heat generation.

Innovation Solution

Implementing an OS scheduler that transitions processor cores into an intermediate 'shielded' state when workload thresholds are met, where no new tasks are assigned, and existing tasks are executed to completion before transitioning to a reduced power state, thereby conserving battery power and preventing thermal damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If tasks are scheduled among heterogeneous processor cores without considering device conditions, then overall response time is reduced and performance is improved, but power consumption increases and thermal damage risk increases

Engineering Contradiction:
Improveoverall response timeVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic scheduling by transitioning processor cores between active and shielded states based on real-time workload conditions. The OS scheduler monitors device conditions and dynamically adjusts core availability, switching cores to shielded state when workload thresholds are met to reduce power consumption while maintaining productivity when conditions permit

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational state parameter of processor cores by introducing a shielded state. This intermediate state allows cores to be excluded from new task scheduling while completing existing tasks, effectively changing the parameter of core availability and power consumption based on workload conditions and device state

Inventive Principle:
Principle #35Parameter changes

2Productivity

If tasks are scheduled among heterogeneous processor cores without considering device conditions, then processing throughput is improved, but thermal damage risk increases

Engineering Contradiction:
Improveprocessing throughputVSAvoidthermal damage risk
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The scheduler dynamically adjusts core availability by transitioning between active and shielded states based on real-time monitoring of device conditions including thermal state. This dynamic adjustment prevents thermal damage by shielding cores when conditions warrant while maintaining processing throughput when conditions permit

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback control by monitoring device conditions and workload thresholds, then using this information to adjust core scheduling decisions. The scheduler receives feedback about device state and continuously adapts its scheduling behavior to prevent thermal damage while maintaining productivity

Inventive Principle:
Principle #23Feedback

3Productivity

If processor cores are kept in active state to maintain performance, then response time is reduced, but power consumption increases

Engineering Contradiction:
Improveresponse timeVSAvoidenergy efficiency
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent changes the operational parameter of processor cores by introducing a shielded state that consumes less power than the active state. This allows the system to reduce energy loss by transitioning cores to shielded state when workload conditions permit, while maintaining quick response capability when conditions warrant

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary actions by proactively transitioning cores to shielded state before thermal or power conditions become critical. The scheduler anticipates conditions by monitoring workload thresholds and device state, taking preventive action to reduce power consumption before energy efficiency deteriorates

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9207994B2Scheduling tasks among processor cores
Publication Date: 2015.12.08 INTEL CORP
  • US9207994B2 patent drawing
  • US9207994B2 patent drawing
  • US9207994B2 patent drawing

AI summary

Embodiments of apparatus, computer-implemented methods, computing devices, systems, and computer-readable media (transitory and non-transitory) are described herein for scheduling a plurality of tasks among a plurality of processor cores. A first processor core of a plurality of processor cores of a computing device may be transitioned to a shielded state, in which no new tasks are to be assigned to the first processor core and tasks already assigned to the first processor core are executed to completion, in response to a determination that a criterion has been met. In various embodiments, the criterion may be based on a condition of the computing device, such as power available to the computing device or a temperature associated with the computing device. In various embodiments, the first processor core may transition to a reduced-power state after the tasks already assigned to the first processor core execute completion.