Oscillating Loop Detection in Formal Verification
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Solution Overview
Problem
Current electronic design verification techniques struggle to distinguish between stable and oscillating combinational loops, leading to incorrect analysis and potential functional, power, and manufacturing issues, as they cannot handle circuits with loops effectively using formal verification.
Innovation Solution
A computer-implemented method for electronic design verification that involves receiving an electronic design with loops, removing sections, generating copies, and analyzing loop output nets using formal verification, with the ability to detect oscillating loops by checking for specific miter values and inverting I/O values to differentiate between loop types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If formal verification is applied to electronic designs with combinational loops, then verification coverage is improved, but analysis accuracy deteriorates due to inability to distinguish between stable and oscillating loops
Solution Approach 1:
The verification process is segmented into multiple analysis passes: initial formal verification to identify loops, followed by classification of loops as stable or oscillating, and finally targeted re-verification. This segmentation allows comprehensive coverage while maintaining accuracy by treating different loop types appropriately.
Solution Approach 2:
An intermediary classification mechanism is introduced between formal verification and final analysis. The system uses loop detection and classification as an intermediate step that processes the output of formal verification and provides refined information for accurate analysis, enabling distinction between stable and oscillating loops.
2Measurement precision
If loop detection and classification mechanisms are added to distinguish stable and oscillating loops, then analysis accuracy is improved, but system complexity increases
Solution Approach 1:
The verification system is divided into modular components: loop detection module, loop classification module, and re-verification module. Each module performs a specific function, making the overall complex system manageable and maintainable while achieving accurate loop classification.
Solution Approach 2:
The verification system performs self-analysis by automatically detecting loops, classifying them as stable or oscillating, and adjusting verification strategies without external intervention. This self-service capability reduces the need for manual configuration and simplifies usage despite the underlying complexity.
3Reliability
If sections of loops are removed and design copies are generated for analysis, then oscillating loop detection capability is improved, but computational resources increase
Solution Approach 1:
Instead of analyzing complete loop structures, the system applies partial action by removing specific sections of loops and analyzing only the critical portions. This reduces computational resources while maintaining reliable detection of oscillating loops through targeted analysis of loop cut inputs and outputs.
Solution Approach 2:
The system generates simplified copies of the electronic design with loop sections removed, rather than analyzing the complete original design multiple times. These copies require fewer computational resources while preserving the essential characteristics needed for reliable oscillating loop detection.
Data Source
AI summary
The present disclosure relates to a computer-implemented method for electronic design verification. The method may include receiving, using a processor, an electronic design having a plurality of loops and removing a section of each of the plurality of loops. The method may further include obtaining an input/output net for each of the plurality of loops and generating a copy of at least a portion of the electronic design. The method may include connecting all inputs except a loop cut input net associated with the removed section and analyzing a loop output net using formal verification.