Oscillation Circuit With Supply-Compensated Clock Frequency Control
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Solution Overview
Problem
Existing oscillation circuits experience frequency fluctuations in clock signals due to variations in power supply voltage, affecting the response lag time of logic circuits and the charging and discharging periods of capacitors.
Innovation Solution
An oscillation circuit design that includes a current adjusting circuit and a reference voltage generation circuit, which adjust the current and voltage differential between reference voltages based on power supply voltage fluctuations, thereby stabilizing the charging and discharging times of capacitors to minimize frequency variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If feedback loop processing including a capacitor and comparator is used to generate clock signal, then the clock signal frequency can be generated, but the frequency fluctuates due to power supply voltage variations affecting comparator response lag time
Solution Approach 1:
The patent implements a feedback mechanism where the power supply voltage is detected and used to control the charging and discharging current of the capacitor. The comparator's response lag time variations are compensated by adjusting the current based on the detected power supply voltage, creating a closed-loop system that maintains frequency stability despite power supply fluctuations.
Solution Approach 2:
The patent changes the current parameter (charging and discharging current of the capacitor) based on the power supply voltage level. When power supply voltage increases causing reduced response lag time, the current is increased to extend the charging/discharging time. When power supply voltage decreases causing increased response lag time, the current is reduced to shorten the charging/discharging time, thereby compensating for the frequency variations.
2Speed
If higher power supply voltage is used, then response lag time of comparison circuit is reduced, but charging time and discharging time of capacitor become too long causing frequency deviation
Solution Approach 1:
The patent makes the charging and discharging current dynamic rather than fixed. The current is continuously adjusted based on the power supply voltage level, allowing the system to adapt the charging/discharging time to compensate for changes in comparator response lag time. This dynamic adjustment ensures that the overall oscillation period remains stable despite variations in individual component timing.
3Loss of time
If lower power supply voltage is used, then response lag time of comparison circuit increases, but charging time and discharging time of capacitor become too short causing frequency deviation
Solution Approach 1:
The patent changes the current parameter in response to power supply voltage variations. When power supply voltage is low causing increased response lag time, the system reduces the charging/discharging current to extend the capacitor charging/discharging time, compensating for the slower comparator response and maintaining stable oscillation frequency.
Data Source
AI summary
This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops. The reference voltage generation circuit increases the voltage differential between the first reference voltage and the second reference voltage when the adjusted current increases, and reduces the voltage differential when the adjusted current decreases.