Oscillation Frequency Control Circuit for DC-DC Converter Noise Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing oscillation frequency control circuits for DC-DC converters in semiconductor devices with integrated radio transmitting and receiving circuits face challenges in reducing switching noise levels without using special control circuits like micro-computers, and they fail to effectively manage noise frequencies that coincide with the tuner section's frequencies, leading to potential reception issues.

Innovation Solution

An oscillation frequency control circuit that continuously changes the frequency of a second clock signal between predetermined lower and upper limit values, utilizing frequency difference detection and control circuits to adjust the division ratios dynamically, thereby distributing noise over a wide frequency range and reducing noise levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the switching frequency is fixed to avoid noise interference with radio frequencies, then reception quality is improved, but the switching noise may still coincide with radio frequencies under different tuning conditions

Engineering Contradiction:
Improvereception qualityVSAvoidfrequency adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by making the switching frequency variable rather than fixed. The oscillation frequency control circuit continuously varies the switching frequency within a range centered on the target frequency, adapting to different radio frequency conditions while maintaining reception quality through frequency diversity.

Inventive Principle:
Principle #15Dynamics

2Object-generated harmful factors

If the oscillation frequency is continuously varied to distribute noise, then switching noise level is reduced, but the frequency stability decreases

Engineering Contradiction:
Improveswitching noise levelVSAvoidfrequency stability
Core Design Contradiction:
Object-generated harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent applies periodic action by continuously and periodically varying the oscillation frequency around a target frequency. This periodic variation distributes the switching noise energy across multiple frequencies over time, reducing the peak noise level at any single frequency while maintaining effective switching operation.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If a micro-computer is used to control division ratio for frequency management, then frequency control precision is improved, but device complexity increases

Engineering Contradiction:
Improvefrequency control precisionVSAvoidcontrol circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies self-service by implementing an automatic frequency control system that operates without micro-computer intervention. The oscillation frequency control circuit autonomously adjusts the switching frequency based on feedback from the division circuit, eliminating the need for complex external control while maintaining frequency management precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8242848B2Oscillation frequency control circuit, and DC-DC converter and semiconductor device having the same
Publication Date: 2012.08.14 NISSHINBO MICRO DEVICES INC
  • US8242848B2 patent drawing
  • US8242848B2 patent drawing
  • US8242848B2 patent drawing

AI summary

An oscillation frequency control circuit configured to control a frequency of a second clock signal of an oscillation circuit generating and outputting the second clock signal having a frequency in response to an input control signal is disclosed. The oscillation frequency control circuit includes a frequency difference detection circuit unit configured to detect a difference between a frequency of a predetermined first clock signal input externally and the frequency of the second clock signal, and generate and output a signal indicating a result of the detection; and a frequency control circuit unit configured to control the frequency of the second clock signal so that the frequency of the second clock signal continually changes back and forth between a predetermined lower limit value and a predetermined upper limit value in response to the output signal from the frequency difference detection circuit.