Oscillation Period Detection Circuit with Valid Time Reforming

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Solution Overview

Problem

Current methods for detecting the oscillation period in Dynamic Random Access Memory (DRAM) suffer from low detection accuracy and efficiency, which is crucial for chip quality assessment.

Innovation Solution

An oscillation period detection circuit comprising an oscillator module, a control module, and a counting module that processes enable signals and oscillation clock signals to determine a target time and period number, thereby calculating the oscillation period accurately.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional detection methods are used for oscillation period in DRAM, then the detection process is simple, but the detection accuracy and efficiency are low

Engineering Contradiction:
Improvedetection accuracyVSAvoiddetection circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The detection circuit is divided into three independent functional modules: oscillator module (generates oscillation clock signal), control module (performs valid time reforming), and counting module (performs period counting). This segmentation allows each module to specialize in one function, improving overall detection accuracy while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary processing steps between signal generation and measurement: the control module acts as an intermediary that performs valid time reforming on the enable signal based on the oscillation clock signal, and the counting module serves as an intermediary that counts periods. These intermediaries ensure accurate synchronization and measurement, resolving the contradiction between accuracy and complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If conventional detection methods are used for oscillation period in DRAM, then the circuit structure is simple, but the detection efficiency is low

Engineering Contradiction:
Improvedetection efficiencyVSAvoiddetection circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The control module performs valid time reforming processing in advance to align the enable signal with the oscillation clock signal periods. This preliminary action ensures that the counting module receives properly synchronized signals, enabling efficient and accurate period counting without requiring complex real-time adjustment mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The oscillator module continuously generates oscillation clock signals, and the counting module continuously counts periods within the valid time window. This continuous operation without interruption or re-initialization significantly improves detection efficiency while the modular structure keeps complexity manageable.

Inventive Principle:
Principle #20Continuity of useful action

3Adaptability or versatility

If the detection circuit processes both high-speed and low-speed clocks, then the adaptability is improved, but the device complexity increases

Engineering Contradiction:
Improveclock speed adaptabilityVSAvoidcircuit design complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The detection circuit is designed with universal components that can handle various clock speeds: the oscillator module generates clock signals regardless of frequency, the control module's valid time reforming logic works with any oscillation period, and the counting module counts periods universally. This multi-functionality achieves clock speed adaptability without requiring speed-specific circuit variations, thus avoiding complexity increases.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12188981B2Oscillation period detection circuit and method, and semiconductor memory
Publication Date: 2025.01.07 CHANGXIN MEMORY TECH INC
  • US12188981B2 patent drawing
  • US12188981B2 patent drawing
  • US12188981B2 patent drawing

AI summary

An oscillation period detection circuit and method, and semiconductor memory are provided. The oscillation period detection circuit includes an oscillator module, a control module, and a counting module. The oscillator module includes a target oscillator, and is configured to receive an enable signal and control the target oscillator to output an oscillation clock signal according to the enable signal; the control module is configured to receive the enable signal and the oscillation clock signal, and perform valid time reforming processing according to the oscillation clock signal and the enable signal to determine a target time; the counting module is configured to receive the enable signal and the oscillation clock signal, and perform period counting processing according to the enable signal and the oscillation clock signal to determine a target period number. The oscillation period of the target oscillator is calculated according to the target time and the target period number.