Local Oscillator Driver Biasing for Second Harmonic Rejection
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Solution Overview
Problem
Designing satisfactory mixers and local oscillator circuitry for electronic devices with wireless communications capabilities is challenging due to non-linearities that produce second harmonic components, which interfere with in-band signals.
Innovation Solution
The implementation of oscillator driver circuitry with bias adjustment circuits, including digital-to-analog converters, that apply differential DC offset voltages to buffer stages in the local oscillator circuitry to minimize the second harmonic conversion gain, thereby reducing undesired in-band spurs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If local oscillator circuitry is used to generate clock signals for mixers, then wireless communication functionality is enabled, but non-linearities produce second harmonic components that interfere with in-band signals
Solution Approach 1:
The patent extracts and removes the harmful second harmonic components from the local oscillator signal by introducing bias adjustment circuits that cancel out these unwanted frequency components, allowing the useful carrier frequency to pass through while eliminating the interfering harmonics
Solution Approach 2:
The patent changes the operating parameters of the buffer stages by applying adjustable DC bias voltages to minimize second harmonic generation. The bias adjustment circuits modify the operating point of the transistors to reduce non-linearities and suppress harmonic distortion
2Power
If second harmonic components are present in the local oscillator signal, then the oscillator can drive the mixer, but the second harmonic conversion gain causes interference with in-band signals
Solution Approach 1:
The patent converts the harmful second harmonic components into a beneficial situation by using the bias adjustment circuits to actively cancel these harmonics. The same buffer stages that could generate harmonics are configured with adjustable bias to suppress them, turning a potential source of interference into a controlled signal path
3Reliability
If bias adjustment circuits are added to minimize second harmonic components, then signal-to-noise ratio is improved, but device complexity increases
Solution Approach 1:
The bias adjustment circuits are designed to perform multiple functions: they adjust the operating point of the buffer stages, minimize second harmonic generation, and provide signal path control. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in overall device complexity
Data Source
AI summary
An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.