Oscillator Output Circuit With Charge-Release Switching
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Solution Overview
Problem
Existing oscillator circuits face issues with unwanted charge accumulation at transistor nodes, leading to noise generation during signal startup, which affects the output waveform and makes it difficult to achieve the desired signal waveform.
Innovation Solution
Incorporating an N-type switch between the drain of the P-type transistor and the ground voltage, and a P-type switch between the drain of the N-type transistor and the power supply voltage, controlled by a control circuit to manage the charge state and prevent noise, along with variable resistance circuits to adjust the signal waveform.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transistor is set to an OFF state in a high-impedance state to stop signal output, then the signal output is stopped, but charge accumulates in the floating drain node causing noise and waveform distortion
Solution Approach 1:
The patent introduces a second switch as an intermediary component connected between the drain of the first MOS transistor and the second power supply voltage node. This second switch acts as a mediator to provide a discharge path for accumulated charges when the first switch is OFF, preventing charge accumulation and noise generation while maintaining the primary signal output control function.
2Ease of operation
If a variable resistance circuit is added to adjust rising and falling times, then signal waveform control is improved, but circuit complexity increases
Solution Approach 1:
The patent makes the second switch multi-functional by enabling it to serve both as a discharge path for charge accumulation (when OFF state of first switch) and as part of the variable resistance control mechanism (when first switch is ON). This integration allows the circuit to achieve waveform adjustment capability without adding excessive complexity, as the second switch participates in multiple circuit functions.
Data Source
AI summary
The circuit device includes a first MOS transistor of a first conductivity type a source of which is coupled to a first power supply voltage node, a second MOS transistor of a second conductivity type a source of which is coupled to a second power supply voltage node, a first variable resistance circuit which is coupled between a drain of the first MOS transistor and an output node, and which includes a first switch, and a second switch coupled between the drain of the first MOS transistor and the second power supply voltage node. The control circuit performs control of making the first switch OFF and making the second switch ON when the clock signal fails to be output from the output node, and making the first switch ON and making the second switch OFF when the clock signal is output from the output node.