Oscillator Clock Output with Synchronized Data on Limited Terminals
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Solution Overview
Problem
Existing oscillators with a limited number of external terminals face challenges in performing both clock signal output and data communication, as they cannot simultaneously output the clock signal to a processing device and maintain data communication without interfering with the clock signal characteristics due to noise from asynchronous serial clock signals.
Innovation Solution
The oscillator continuously outputs a clock signal as a slave, allowing it to maintain a stable frequency and perform data communication by using its clock output terminal for both clock signal transmission and data synchronization, even when the number of external terminals is limited, preventing noise interference and ensuring continuous operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the oscillator performs asynchronous serial communication to enable data transmission with limited terminals, then data communication capability is improved, but noise interference deteriorates clock signal characteristics
Solution Approach 1:
The patent merges the clock signal output function and data communication function into a single terminal. The oscillator outputs both the clock signal and data signal through the same terminal, allowing data communication while maintaining clock signal stability without requiring separate terminals for each function.
Solution Approach 2:
The oscillator terminal is designed to serve multiple functions simultaneously. It acts as both a clock signal output terminal and a data communication terminal, enabling the limited terminal to perform both timing and data transmission roles without compromising either function.
2Adaptability or versatility
If the oscillator uses a separate data terminal for communication, then data transmission is enabled, but the number of external terminals increases
Solution Approach 1:
The patent combines the clock signal output terminal and data terminal into one unified terminal. This merging reduces the total number of external terminals required, simplifying the device interface while maintaining both clock signal output and data communication capabilities.
Solution Approach 2:
The oscillator terminal is designed to serve multiple functions simultaneously. It acts as both a clock signal output terminal and a data communication terminal, enabling the limited terminal to perform both timing and data transmission roles without compromising either function.
3Reliability
If the oscillator outputs clock signal continuously, then clock signal stability is maintained, but data communication capability is limited
Solution Approach 1:
The patent merges the clock signal output function and data communication function into a single terminal. The oscillator outputs both the clock signal and data signal through the same terminal, allowing data communication while maintaining clock signal stability without requiring separate terminals for each function.
Solution Approach 2:
The oscillator employs periodic modulation of the clock signal to encode data. By varying the clock signal periodically according to data bits, it enables asynchronous serial communication while maintaining continuous clock signal output and stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the oscillator to maintain accurate and stable clock signal output while performing data communication, preventing noise interference and ensuring continuous operation, thus addressing the limitations of existing oscillators with limited terminals.
Implementation Method 1
a resonator; an oscillation circuit configured to generate an oscillation signal by the resonator
Data Source
AI summary
An oscillator includes: a resonator; an oscillation circuit configured to generate an oscillation signal by the resonator; a clock output terminal; an output circuit configured to output a clock signal to an external processing device via the clock output terminal; a first terminal; and an interface circuit configured to execute communication with the processing device by a data signal. In the communication, the output circuit outputs the clock signal to the processing device that is a master for the communication, and the interface circuit that is a slave for the communication receives, via the first terminal, the data signal that is transmitted from the processing device and synchronized with the clock signal, or transmits, via the first terminal, the data signal to the processing apparatus in synchronization with the clock signal.


