Oscillator Clock Generator Filtering for Stable 50% Duty Cycle
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock generators for integrated circuits face inefficiencies in power consumption and stability due to unregulated currents and common mode variations, leading to potential loss of output clock signals.
Innovation Solution
A clock generator design incorporating a filter structure and comparator to separate high-frequency and common mode components of oscillator signals, with a current controller adjusting bias currents based on signal amplitude to maintain stable operation and conserve power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If dynamic variation of current source is used to conserve power, then power consumption is reduced, but common mode operating point variation occurs leading to loss of output clock signal
Solution Approach 1:
The patent segments the clock generator into distinct functional blocks: oscillator, filter structure, and comparator. The filter structure further separates high-frequency signal components from common mode components, allowing independent handling of each to resolve the contradiction between power saving and signal stability.
Solution Approach 2:
The filter structure acts as an intermediary between the oscillator and comparator. It processes the oscillator output by separating signal and common mode components, preventing common mode variations from directly affecting the comparator and thus maintaining reliable clock signal generation while allowing dynamic current control.
2Device complexity
If unregulated currents are used in oscillator, then circuit complexity is reduced, but power consumption increases and operation becomes unstable
Solution Approach 1:
The patent implements feedback through the filter structure that monitors the oscillator output and separates common mode components. This feedback mechanism allows the system to maintain stable operation with regulated current by detecting and compensating for common mode variations, resolving the contradiction between simplicity and efficiency.
3Loss of energy
If dynamic current control is applied, then energy efficiency is improved, but common mode variation causes duty cycle distortion
Solution Approach 1:
The patent extracts the common mode component from the oscillator signal using the filter structure. By separating and removing the common mode variation that causes duty cycle distortion, the system can safely apply dynamic current control for energy efficiency while maintaining precise 50% duty cycle output through the comparator.
Data Source
AI summary
A clock generator is disclosed for use with an oscillator device. The clock generator may include a signal conditioning pre-filter and a comparator. The signal conditioner may have an input for a signal from the oscillator device, and may include a high pass filter component and a low pass filter component. The high pass filter component may pass amplitude and frequency components of the input oscillator signal but reject a common mode component of the oscillator signal. Instead, the high pass filter component further may generate its own common mode component locally over which the high frequency components are superimposed. The low pass filter component may generate a second output signal that represents the locally-generated common mode component of the first output signal. The clock generator may have a comparator as an input stage which is coupled to first and second outputs of the filter structure.