Oscillator Clock Synchronization for Smooth Frequency Switching
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Solution Overview
Problem
Oscillator circuits experience sudden frequency changes, leading to overshoot or undershoot in output voltage, which is unfavorable for peripheral applications like DC-DC converters due to the need to rebuild the phase-locked loop.
Innovation Solution
An oscillator circuit design that includes a frequency setting circuit, clock signal generating circuits, a clock synchronization circuit, and a control circuit to smoothly switch between internal frequency setting and external synchronization, maintaining a phase-locked loop without rebuilding, using voltage-controlled switches and hysteretic voltage comparators to adjust clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the phase-locked loop is rebuilt when switching frequency between external resistor setting and external synchronization clock signal, then the frequency switching is achieved, but voltage overshoot or undershoot occurs in the output
Solution Approach 1:
The patent applies preliminary action by pre-configuring the phase-locked loop circuit to remain active and ready during frequency switching. The circuit maintains the phase-locked loop structure in advance, allowing it to quickly adapt to frequency changes without complete reconstruction, thereby preventing voltage overshoot or undershoot while achieving frequency switching between external resistor setting and external synchronization clock signal modes.
2Adaptability or versatility
If the phase-locked loop is rebuilt during frequency switching, then frequency adaptability is improved, but the switching process causes harmful voltage fluctuations
Solution Approach 1:
The patent implements beforehand cushioning by designing the phase-locked loop circuit to maintain continuous operation during frequency switching. The circuit prepares the frequency adjustment mechanism in advance, cushioning against sudden voltage changes that would otherwise occur during reconstruction. This approach allows frequency adaptability while suppressing harmful voltage overshoot or undershoot through pre-configured circuit behavior.
Data Source
AI summary
An oscillator circuit includes a frequency setting circuit, a first and a second clock signal generating circuit, a clock synchronization circuit, a control circuit, and an output circuit. The first and second clock signal generating circuits generate first and second clock signals respectively. The control circuit outputs a frequency setting signal via a second node, outputs the first clock signal via a sixth node, and outputs the second clock signal via a seventh node when the first frequency selecting signal is at an effective voltage level; otherwise, outputs a second synchronization control signal via the second node, outputs an external synchronization clock signal via the sixth node, and outputs a first clock signal via the seventh node. The clock synchronization circuit generates the first and second synchronization control signals. The output circuit outputs the first or second clock signal.