Network Node Oscillator Frequency Compensation via Bus Reset Pulse

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Solution Overview

Problem

Existing point-to-point data communication networks, such as those following the IEEE 1394 Standard, face challenges in maintaining data integrity due to variations in local oscillator frequencies caused by aging and temperature effects, which restrict packet sizes and require expensive, complex oscillators with tight frequency tolerance.

Innovation Solution

A data communication network node with a local crystal oscillator, a reset stage, and a control mechanism to adjust the oscillator frequency based on the length of a bus reset pulse, allowing for precise measurement and correction of timing differences between nodes, thereby compensating for aging and temperature effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the maximum tolerance of oscillation frequency is strictly enforced (e.g., +/−100 ppm), then data integrity is maintained, but the maximum packet length is limited (e.g., 312 bytes for IEEE 1394)

Engineering Contradiction:
Improvedata integrityVSAvoidpacket length
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent applies preliminary action by performing frequency compensation at the beginning of each data packet transmission through a reset pulse mechanism. The first node measures the frequency deviation of the second node's oscillator before data transmission and adjusts accordingly, preventing timing drift from compromising data integrity during the entire packet transmission process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by having the first node continuously monitor the oscillation frequency of the second node's local oscillator and adjust the reset pulse timing or frequency based on measured deviations. This closed-loop feedback ensures that timing synchronization is maintained even when oscillators drift due to aging or temperature effects.

Inventive Principle:
Principle #23Feedback

2Reliability

If expensive and complex local oscillators with very stable oscillation frequencies are used, then frequency tolerance is reduced, but device cost and complexity increase

Engineering Contradiction:
Improveoscillator frequency stabilityVSAvoidoscillator complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the reset pulse as an intermediary mechanism to transfer timing reference information between nodes. Instead of relying on each node's oscillator being inherently stable, the reset pulse carries synchronization information from a reference node to other nodes, allowing the use of simpler, less expensive oscillators while maintaining overall network timing accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent effectively copies the timing reference from a reference node to other nodes through the reset pulse mechanism. The first node generates a reset pulse based on its local timing reference, and this pulse serves as a copied timing signal that synchronizes the second node's operations, eliminating the need for each node to have an independently ultra-stable oscillator.

Inventive Principle:
Principle #26Copying

3Reliability

If protection circuits are used to compare bit rates and handle aging effects, then frequency drift is compensated, but device complexity increases

Engineering Contradiction:
Improvefrequency drift compensationVSAvoidprotection circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the frequency compensation function with the existing reset pulse mechanism already present in the network protocol. Instead of adding separate protection circuits for frequency drift compensation, the patent combines timing measurement and frequency compensation into the standard reset pulse sequence, utilizing existing infrastructure to achieve frequency drift compensation without significant additional complexity.

Inventive Principle:
Principle #5Merging (Combining)

4Adaptability or versatility

If new applications support different speeds and idle states, then network versatility is improved, but bit rate comparison for protection becomes impractical

Engineering Contradiction:
Improvenetwork speed adaptabilityVSAvoidbit rate comparison feasibility
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent replaces the mechanical/bit-rate comparison approach with a time-domain measurement approach. Instead of comparing actual data bit rates during transmission (which is impractical with variable speeds and idle states), the patent measures the time duration of the reset pulse using local oscillators and timers, providing a speed-independent method for frequency drift detection that works across different transmission speeds and idle conditions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8140881B2Circuitry and method for detection of network node aging in communication networks
Publication Date: 2012.03.20 TEXAS INSTRUMENTS INC
  • US8140881B2 patent drawing
  • US8140881B2 patent drawing

AI summary

The network node includes a local crystal oscillator for providing a time reference derived from the clock signal produced by the local crystal oscillator, a reset stage for resetting the network node in response to a bus reset pulse received through the network and a control means for issuing a bus reset pulse of a predetermined length substantially greater than a clock period of the clock signal of the local crystal oscillator. Further the network node includes a bus reset detector for determining a length of the received bus reset pulse based on the local time reference. The bus reset detector in the network node is also adapted to adjust the local time reference based on the determined length of the received bus reset pulse.