Integrating Self-Test Oscillator with Injection-Locked Buffer
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Solution Overview
Problem
Conventional wireless receivers require separate testing circuits for Built-In Self Test (BIST) functions, which increase power consumption and occupy additional area, limiting performance and increasing manufacturing costs.
Innovation Solution
An apparatus and method integrating an injection-locked buffer and an electronic oscillator into a single region of an integrated circuit (IC) chip, allowing for self-test functionality without an external reference signal, with the oscillator sharing a power supply with the amplifier, reducing power consumption and eliminating the need for a separate oscillator circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate testing circuits are formed for Built-In Self Test (BIST) functions, then self-test capability is achieved, but power consumption increases and additional area is occupied
Solution Approach 1:
The patent combines the BIST oscillator circuit with the injection-locked buffer circuit into a single integrated structure. The oscillator shares the power supply, transistors, and physical space with the buffer, eliminating the need for completely separate testing circuits while maintaining self-test functionality.
Solution Approach 2:
The injection-locked buffer circuit is designed to serve dual purposes: normal signal buffering function and self-test oscillator function. By integrating the BIST oscillator within the buffer structure, the same hardware resources are utilized for both operational and testing modes, reducing overall power consumption and area occupation.
2Reliability
If separate testing circuits are formed for Built-In Self Test (BIST) functions, then self-test capability is achieved, but additional area is occupied
Solution Approach 1:
The BIST oscillator circuit is merged with the injection-locked buffer circuit, sharing transistors, power supply connections, and physical space on the integrated circuit. This integration dramatically reduces the total area required compared to having completely separate circuits for testing and buffering functions.
Solution Approach 2:
The oscillator circuit is nested within the injection-locked buffer structure, with the BIST functionality embedded inside the buffer's existing transistor network and power distribution. This nesting approach allows the testing circuit to utilize the spatial framework already established by the buffer circuit.
3Reliability
If distinct testing circuits are formed separately from other hardware, then testing functionality is achieved, but manufacturing costs increase
Solution Approach 1:
By merging the BIST oscillator with the injection-locked buffer into a single integrated circuit structure, the patent reduces the total component count and simplifies the manufacturing process. Fewer separate circuits mean fewer fabrication steps, reduced testing complexity, and lower overall manufacturing costs while maintaining full testing functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This integration enables efficient power usage and reduced manufacturing costs while maintaining effective self-test capabilities, improving the performance and efficiency of wireless receivers by generating test signals within the same circuit as the amplifier.
Implementation Method 1
configured to generate an oscillator output for transmission to the output node based on a back gate bias voltage applied to the electronic oscillator
Implementation Method 2
a pair of cross-coupled amplifier transistors configured to amplify a voltage of the differential reference signal to yield a voltage-amplified reference signal
Implementation Method 3
an access transistor having a gate coupled to a switching node, and a back gate terminal coupled to the back gate bias voltage, wherein the access transistor is configured to enable or disable current flow through the electronic oscillator
Data Source
AI summary
The disclosure provides an apparatus including: a pair of signal injection transistors each having a gate terminal coupled to a differential reference signal, and a pair of cross-coupled amplifier transistors configured to amplify a voltage of the differential reference signal to yield a voltage-amplified reference signal at a local oscillator (LO) port of a mixer; an electronic oscillator having an oscillation output node coupled to the LO port of the mixer in parallel with the injection-locked buffer, and configured to generate an oscillator output for transmission to the output node based on a back gate bias voltage applied to the electronic oscillator; and an access transistor having a gate coupled to a switching node, and a back gate terminal coupled to the back gate bias voltage, wherein the access transistor is configured to enable or disable current flow through the electronic oscillator in parallel with the injection-locked buffer.