Voltage-Tolerant Oscillator Input for High-Voltage External Clocks

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Solution Overview

Problem

Pierce gate oscillator circuits in integrated circuits face damage from externally supplied clock signals with peak voltages exceeding the rating of the transistors, particularly in automotive Ethernet applications where the on-chip oscillator operates at 1.8V but may receive 3.3V clock signals.

Innovation Solution

The implementation of a transistor configuration between the feedback resistor and the inverter input, using a drain extended n-type metal-oxide-semiconductor transistor with a gate biased at the same supply voltage as the inverter, ensures the input voltage to the inverter remains below its rating, and the inclusion of filters to attenuate noise and mismatch common mode voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the inverter is directly connected to receive external clock signals, then the oscillator can accept external clock input, but the transistor may be damaged by high voltage exceeding its rating

Engineering Contradiction:
Improveability to receive external clock signalsVSAvoidtransistor voltage damage
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A voltage divider circuit comprising a first resistor and a second resistor is inserted between the external clock signal input and the inverter input. This intermediary circuit divides the incoming voltage to ensure the inverter receives a safe voltage level that does not exceed its rating, while still allowing the oscillator to accept external clock signals.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The voltage divider circuit transforms the voltage parameter of the external clock signal by dividing it according to the resistor ratio. The first resistor and second resistor are selected with specific resistance values to achieve the desired voltage reduction, converting a potentially damaging high voltage signal into a safe operating voltage for the inverter.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If voltage division is used to protect the inverter, then transistor damage is prevented, but the circuit complexity increases

Engineering Contradiction:
Improvetransistor protection from voltage damageVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The voltage divider uses simple resistor components to change the voltage parameter, avoiding the need for complex active protection circuits. The first resistor and second resistor form a passive voltage division network that is easy to implement and integrates seamlessly with the existing oscillator circuit.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The resistor-based voltage divider serves as a simple intermediary element that mediates between the external high-voltage clock signal and the low-voltage inverter input. This passive intermediary approach is simpler than using active protection devices such as transistors or diodes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11637529B2Voltage tolerant oscillator with enhanced RF immunity performance
Publication Date: 2023.04.25 TEXAS INSTRUMENTS INC
  • US11637529B2 patent drawing
  • US11637529B2 patent drawing
  • US11637529B2 patent drawing

AI summary

An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.