Oscillator Circuit with LDO and Charge Pump for Jitter Reduction
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Solution Overview
Problem
Existing oscillator circuits face challenges in effectively suppressing oscillation frequency jitter, which is influenced by power noise, and there is a need for improved techniques to stabilize oscillation frequencies in integrated circuits.
Innovation Solution
Incorporating an NMOS transistor, operational amplifier, and a charge pump into the oscillator circuit, where the charge pump generates a boosted power supply voltage using the oscillation clock signal to stabilize the power supply voltage, and an LDO configured as a source follower to control the gate voltage of the NMOS transistor, thereby reducing oscillation frequency jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an LDO is disposed between the power supply line and the oscillator to suppress power noise, then oscillation frequency jitter is reduced, but the power supply voltage cannot be sufficiently stabilized due to limited regulation capability
Solution Approach 1:
The patent combines the LDO and charge pump into a single integrated power supply unit. The LDO provides baseline voltage regulation while the charge pump provides additional boosting capability, merging two regulation mechanisms into one system that delivers both stability and sufficient voltage headroom for the oscillator.
Solution Approach 2:
The power supply circuit is designed to perform multiple functions: the LDO provides continuous voltage regulation to suppress power noise, while the charge pump provides voltage boosting when additional headroom is needed. This multi-functional design enables the system to handle both normal operation and edge cases where higher voltage stability is required.
2Reliability
If a charge pump is added to generate boosted power supply voltage for the operational amplifier, then power supply voltage stability is improved, but circuit complexity increases
Solution Approach 1:
The charge pump is integrated with the LDO in a unified power supply circuit. The operational amplifier controls both the LDO and charge pump through coordinated gate voltage adjustments, merging voltage regulation and boosting functions into a single control system that reduces overall circuit complexity despite adding charge pump components.
Solution Approach 2:
The operational amplifier automatically adjusts the gate voltage of the NMOS transistor to coordinate between the LDO and charge pump based on the oscillator's power terminal voltage. This self-regulating mechanism eliminates the need for external control circuits, allowing the system to self-optimize power supply stability without increasing control complexity.
3Reliability
If the operational amplifier controls the NMOS transistor gate voltage to stabilize oscillator power supply, then oscillation frequency jitter is suppressed, but power consumption increases
Solution Approach 1:
The charge pump operates periodically based on the oscillation clock signal or a derived clock signal. This periodic operation allows the charge pump to provide voltage boosting only when needed during oscillator operation, rather than continuously, thereby reducing overall power consumption while maintaining frequency stability during critical oscillation periods.
Solution Approach 2:
The operational amplifier monitors the voltage at the oscillator's power terminal and automatically adjusts the NMOS transistor gate voltage to maintain stable power supply. This feedback-based self-regulation ensures power is consumed only when voltage stabilization is needed, minimizing unnecessary power consumption while effectively suppressing oscillation frequency jitter.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses oscillation frequency jitter and stabilizes the oscillation frequency by automatically compensating changes in the power supply voltage, enhancing the stability of the oscillator circuit without requiring external clock signals, thus reducing circuit complexity.
Implementation Method 1
The charge pump is configured to generate a boosted power supply voltage through boosting the first power supply voltage by using the oscillation clock signal or a clock signal generated from the oscillation clock signal
Implementation Method 2
The operational amplifier controls a gate voltage of the NMOS transistor according to a voltage of the power terminal of the oscillator
Data Source
AI summary
A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump.The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.