Oscillator Output Circuit for Low-Voltage Harmonic Reduction
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Solution Overview
Problem
Existing oscillators struggle to operate at low voltages while minimizing higher harmonic wave components in their output signals, which are detrimental in communication systems.
Innovation Solution
An oscillation control apparatus comprising series-connected N-type MOS transistors, a bias unit generating different DC bias voltages, a constant voltage power supply, and an inverter unit, along with DC and AC component elimination units, to produce a signal with reduced harmonic content operable at lower voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If CMOS transistors are used as output amplifying circuit to enable low voltage operation, then power supply voltage can be reduced to 1.8V or lower, but higher harmonic wave components are generated in the output signal
Solution Approach 1:
The output amplifying circuit is divided into multiple stages: a first amplifying stage using CMOS transistors for voltage gain and a second amplifying stage using source follower type NMOS transistors for waveform shaping. This segmentation allows each stage to perform its specialized function, with the first stage providing low-voltage operation and the second stage reducing harmonic content.
Solution Approach 2:
The invention combines two different transistor configurations (CMOS and source follower NMOS) in a cascaded arrangement within the output amplifying circuit. The CMOS section handles the primary amplification at low voltage, while the source follower section cleans up the waveform by reducing higher harmonic components, achieving both low voltage operation and clean sine wave output.
2Object-generated harmful factors
If source follower type NMOS transistors are used in output amplifying circuit to reduce higher harmonic wave components, then output waveform is approximated to SIN wave, but power supply voltage must be 2.0V or higher
Solution Approach 1:
The output amplifying circuit is divided into multiple stages: a first amplifying stage using CMOS transistors for voltage gain and a second amplifying stage using source follower type NMOS transistors for waveform shaping. This segmentation allows each stage to perform its specialized function, with the first stage providing low-voltage operation and the second stage reducing harmonic content.
Solution Approach 2:
The invention combines two different transistor configurations (CMOS and source follower NMOS) in a cascaded arrangement within the output amplifying circuit. The CMOS section handles the primary amplification at low voltage, while the source follower section cleans up the waveform by reducing higher harmonic components, achieving both low voltage operation and clean sine wave output.
3Device complexity
If amplitude adjust-purpose regulator is designed to output voltage lowered by collector-to-emitter saturation voltage, then voltage headroom is optimized, but minimum power supply voltage increases to 2.0V
Solution Approach 1:
The voltage regulation function is segmented into two independent regulators: an internal power supply regulator for the oscillating circuit and an amplitude adjust-purpose regulator for the output amplifying circuit. This allows each regulator to be optimized for its specific function without being constrained by the other, enabling low-voltage operation while maintaining proper amplitude control.
Solution Approach 2:
The invention changes the operating parameters of the amplitude adjust-purpose regulator by using source follower type NMOS transistors instead of bipolar transistors. This parameter change eliminates the collector-to-emitter saturation voltage constraint, allowing the regulator to operate at lower voltages (1.8V or lower) while still providing the necessary voltage adjustment capability.
Data Source
AI summary
An oscillation control apparatus is provided with: an oscillating unit for oscillating an oscillating element; an output amplifying circuit having two pieces of same types of transistors series-connected to each other, for outputting a signal from a junction point between the two transistors in response to an oscillation signal outputted from the oscillating unit; a bias unit for generating two DC bias voltages having different levels from each other, which are applied to either respective gates or respective bases of the two transistors; a constant voltage power supply unit for applying a constant voltage to the oscillating unit; and an inverter unit provided between the oscillating unit and any one of either the gates or the bases of the two transistors, for inverting a phase of the oscillation signal outputted from the oscillating unit. Both the oscillation signal outputted from the oscillating unit and one of the two bias voltages are applied to either the gate or the base of one of the two transistors; and both an oscillation signal outputted from the oscillating unit and whose phase has been inverted by the inverting unit and the other bias voltage of the two bias voltages are applied to either the gate or the base of the other transistor of the two transistors.