Capacitor-Modulated PLL Oscillator for Wideband EVM Control
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Solution Overview
Problem
Signal generators face challenges in meeting stringent error vector magnitude (EVM) and spectral mask requirements, particularly in wideband OFDM transmission, while also handling capacitor process, voltage, and temperature (PVT) variations, which often result in high power consumption and complex oscillator designs.
Innovation Solution
A signal generator with a phase-locked loop (PLL) and a modulation stage using switchable capacitors, where a modulation gain estimation stage determines the frequency-to-capacitor modulation gain, and a modulation range reduction module clips the modulation range to reduce complexity and power consumption, averaging phase errors to maintain long-term phase coherency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oversampling is used in digital modulation circuitry to meet EVM and spectral mask requirements, then signal quality is improved, but power consumption and circuit complexity increase
Solution Approach 1:
The patent replaces the conventional approach of using high-speed digital modulation circuitry with oversampling with a direct digital synthesis (DDS) based frequency modulation approach. This substitutes complex digital signal processing mechanics with a simpler frequency control mechanism, reducing power consumption while maintaining signal quality requirements.
Solution Approach 2:
The patent changes the modulation parameter from time-domain oversampling to frequency-domain modulation. By modulating the frequency of a voltage-controlled oscillator (VCO) directly according to the modulation signal, the system avoids the power-intensive oversampling operations while achieving the required spectral characteristics.
2Measurement precision
If a large frequency swing is used to handle fast phase transitions, then phase transition accuracy is improved, but oscillator complexity and power consumption increase
Solution Approach 1:
The patent implements dynamic frequency adjustment by controlling the VCO with a modulation signal that varies over time. The frequency swing is dynamically adapted to the modulation requirements rather than being fixed at a large value, allowing accurate phase transitions while reducing oscillator complexity and power consumption.
3Stability of the object's composition
If redundancy is added to the oscillator design to handle capacitor PVT variations, then frequency stability is improved, but device complexity increases
Solution Approach 1:
The patent employs a phase-locked loop (PLL) that provides feedback control to the VCO. The PLL continuously monitors the output frequency and adjusts the VCO control voltage to maintain the desired frequency despite capacitor PVT variations, achieving frequency stability without adding redundant oscillator structures.
Solution Approach 2:
The patent introduces a programmable frequency divider as an intermediary between the VCO and the output. This divider allows coarse frequency adjustment and helps compensate for VCO frequency variations caused by capacitor PVT effects, reducing the need for complex redundant oscillator designs.
Data Source
AI summary
A signal generator has a nominal frequency control input and a modulation frequency control input and comprises an oscillator, with a first set of capacitors at least partially switchably connectable for adjusting a frequency of the oscillator as part of a phase-locked loop, and a second set of capacitors comprised in a modulation stage of the oscillator, switchably connectable for modulating the frequency and controlled by the modulation frequency control input; a modulation gain estimation stage configured to determine a frequency-to-capacitor modulation gain; and a modulation range reduction module configured for clipping a modulation range of the oscillator to a range achievable using the second set of capacitors, using the modulation gain averaging out, in time, a phase error caused by the said clipping; and mimicking the said clipping, additively output to the nominal frequency control input to compensate said PLL for the said modulation.