Relaxation Oscillator Circuit With RC Delay Absorption
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Solution Overview
Problem
Traditional relaxation oscillator circuits face issues with power consumption, hardware overhead, and complex startup procedures, leading to unstable output clock frequency and duty cycle deviations due to mismatched on-chip components and reliance on complex control procedures.
Innovation Solution
The proposed oscillator circuit incorporates an integrator, a comparator, an edge-triggered flip-flop, and capacitors, utilizing a single comparator and edge-triggered flip-flop to simplify the circuit structure, reduce power consumption, and enable reliable startup by absorbing delay into the RC charging and discharging time, thus maintaining stable frequency and optimizing area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional relaxation oscillator circuit with comparator and latch circuit is used, then oscillation function is achieved, but logic delay changes with voltage and temperature causing frequency instability
Solution Approach 1:
The patent merges the comparator delay and latch circuit delay into a unified RC charging/discharging process. The comparator output directly controls the charging current source, and the latch circuit is eliminated by using the integrator capacitor voltage to directly drive the switching transistor. This integration absorbs the logic delay into the RC time constant, making the total period dependent only on RC values which are more stable with voltage and temperature changes.
Solution Approach 2:
The integrator capacitor serves multiple functions: it integrates the charging current to generate the oscillating waveform, it provides the voltage that controls the switching transistor gate, and it determines the oscillation period through its RC time constant. This multi-functionality eliminates the need for separate latch circuit while maintaining oscillation control.
2Reliability
If voltage average feedback oscillator circuit is used, then frequency stability is improved, but power consumption and hardware overhead increase
Solution Approach 1:
The patent extracts and eliminates the redundant voltage average feedback circuitry from the oscillator design. By using a simple RC charging/discharging mechanism with a single comparator and latch circuit, the invention achieves oscillation without the complex feedback network, thereby reducing power consumption and hardware overhead while maintaining frequency stability through the RC time constant.
Solution Approach 2:
The patent uses simple, low-power components such as basic resistors, capacitors, and a single comparator-latch circuit combination. These components consume minimal power compared to the complex voltage average feedback circuitry, and the overall circuit design favors simplicity and low power consumption over sophisticated feedback mechanisms.
3Reliability
If voltage average feedback oscillator circuit is used, then frequency stability is improved, but component mismatch causes duty cycle deviation from 50%
Solution Approach 1:
The patent introduces an asymmetry correction mechanism by using separate charging and discharging current sources with different magnitudes. The charging current is set to be different from the discharging current to compensate for component mismatches, allowing the duty cycle to be adjusted to exactly 50% even when capacitor or resistor values vary due to manufacturing tolerances.
4Reliability
If voltage average feedback oscillator circuit is used, then frequency stability is improved, but complex startup control procedures are required
Solution Approach 1:
The patent incorporates a startup circuit that automatically initializes the oscillator without requiring complex external control procedures. The startup circuit pre-charges the integrator capacitor to a specific voltage level and ensures the switching transistor is in the correct initial state before normal oscillation begins, eliminating the need for manual reset or delayed release of latch circuit inputs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces power consumption and hardware overhead, simplifies startup procedures, and maintains stable output frequency and duty cycle, allowing for concise and reliable operation without affecting overall performance.
Implementation Method 1
a first capacitor and a second capacitor. The edge triggered flip-flop is configured to output a first signal and a second signal which are mutually exclusive, and to flip the first signal and the second signal when detecting a rising edge or a falling edge output by the comparator such that: when the first signal is at a designated level, the first capacitor is charged and the second capacitor is discharged
Data Source
AI summary
An oscillator circuit includes an integrator, a comparator, an edge triggered flip-flop, and first and second capacitors. The edge triggered flip-flop has an input terminal coupled to an output terminal of the comparator and is configured to output first and second signals which are mutually exclusive, and to flip the signals when detecting a rising or falling edge output by the comparator such that: when the first signal is at a designated level, the first capacitor is charged and the second capacitor is discharged, and a terminal of the first capacitor is coupled to an input terminal of the integrator; and when the second signal is at a designated level, the second capacitor is charged and the first capacitor is discharged and a terminal of the second capacitor is coupled to the input terminal of the integrator.