Crystal Oscillator Reset Timing for Lower Reference Clock Phase Noise

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Solution Overview

Problem

Existing crystal oscillators face challenges in reducing phase noise of the reference clock without introducing side effects, which affects the overall performance of electronic systems.

Innovation Solution

A crystal oscillator design incorporating a crystal oscillator core circuit, a bias circuit, a pulse wave buffer, and a phase noise reduction circuit that generates a reset signal with an AC ground path to reset resistor noise on the bias voltage, without calibrating the reset pulse to the zero-crossing point of the sinusoidal wave.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional circuits are added to improve crystal oscillator performance (reduce phase noise), then phase noise performance is improved, but device complexity increases

Engineering Contradiction:
Improvephase noise performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The phase noise reduction function is segmented into a dedicated reset circuit that operates independently from the main oscillator core. This reset circuit periodically discharges the bias voltage node, removing noise accumulation without requiring complex modifications to the entire oscillator structure. The segmentation allows simple addition of noise reduction functionality while maintaining the original oscillator design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A reset switch acts as an intermediary element between the bias voltage node and ground. This single intermediary component provides a controlled path for noise discharge, mediating the interaction between the oscillator core and noise reduction mechanism. The reset switch enables phase noise reduction through a simple, isolated intervention point rather than requiring complex circuit interconnections.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If calibration to zero-crossing point is implemented, then phase noise reduction precision is improved, but ease of operation deteriorates

Engineering Contradiction:
Improvephase noise reduction precisionVSAvoidimplementation complexity
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The reset circuit is designed to operate at predetermined time intervals regardless of the instantaneous phase of the sinusoidal wave. This preliminary action approach eliminates the need for real-time phase detection and calibration, as the reset function is performed in advance at fixed intervals that are sufficient to prevent noise accumulation. The predetermined timing simplifies operation while maintaining effective phase noise reduction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The reset circuit operates autonomously using a simple timer or counter mechanism that automatically triggers reset pulses at fixed intervals. The system self-regulates the reset timing without requiring external calibration or phase synchronization, making the implementation straightforward and easy to operate while effectively reducing phase noise through periodic bias voltage discharge.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11606063B2Crystal oscillator and phase noise reduction method thereof
Publication Date: 2023.03.14 MEDIATEK INC
  • US11606063B2 patent drawing
  • US11606063B2 patent drawing
  • US11606063B2 patent drawing

AI summary

A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator includes a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may provide an alternating current (AC) ground path for noise on the bias voltage according to a reset pulse, wherein a position of the reset pulse is set by a control voltage on a control terminal of the phase noise reduction circuit.