Image Processor OSD Data Segmentation for Transmission Delay Reduction
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Solution Overview
Problem
Existing image processing systems that use two image processing circuits to achieve the OSD function face delays in outputting combined image data due to the time required to transmit OSD image data between the circuits.
Innovation Solution
The system divides OSD image data into multiple sets and transmits these along with position information, allowing for faster data transmission and processing of combined image data by reducing the resolution of the OSD image data and using compression when necessary, thereby shortening the time required to output combined image data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If OSD image data is transmitted from the first image processing circuit to the second image processing circuit, then the OSD function can be achieved, but the time required to output combined image data increases
Solution Approach 1:
The OSD image data is divided into multiple sets of divided OSD image data, each having lower resolution than the original OSD image data. This segmentation allows the data to be transmitted more quickly through the signal line while still achieving the OSD function when reassembled at the second image processing circuit.
2Loss of time
If the resolution of OSD image data is reduced to shorten transmission time, then the time required to output combined image data decreases, but the quality of the OSD image may deteriorate
Solution Approach 1:
Position information representing the positions of the divided OSD image data is transmitted through a second signal line in parallel with the image data transmission. This additional dimension of information allows the second image processing circuit to correctly reassemble the segmented data without requiring full-resolution transmission, thus maintaining image quality while reducing transmission time.
Data Source
AI summary
An image processing apparatus includes a first image processing circuit and a second image processing circuit connected to the first image processing circuit via a first signal line and a second signal line. The first image processing circuit outputs OSD image data representing an OSD image in the form of n sets of divided OSD image data that are generated by dividing the OSD image data by n to the second image processing circuit via the first signal line and outputs position information of the divided OSD image data to the second image processing circuit via the second signal line. The second image processing circuit outputs, based on first input image data, the n sets of divided OSD image data, and the position information, combined image data representing a combined image formed of the first input image on which the OSD image is superimposed.


