Oxide Semiconductor FET Protection via TSV Isolation and Seal Layer
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Solution Overview
Problem
Oxide semiconductor materials are prone to damage during the production process of semiconductor devices, affecting the performance of oxide semiconductor transistors due to oxidation, and existing methods fail to adequately prevent damage from out-diffused mist and hydrogen.
Innovation Solution
A method involving a substrate with opposite surfaces where a silicon FET and an OSFET are formed separately, with a multi-annealing process to reduce diffused mist and hydrogen in insulating layers to less than 1%, and a through-silicon via (TSV) is used to interconnect them without affecting the OSFET, while forming a seal layer to protect the OSFET.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If oxide semiconductor material is used to form OSFET, then the device can utilize semiconductor properties of transparent conductive oxides, but the oxide semiconductor layer is prone to oxidation damage during production process
Solution Approach 1:
The patent divides the semiconductor device into two separate surfaces: one for forming silicon FET and another for forming oxide semiconductor FET. This segmentation isolates the oxide semiconductor layer from potential oxidation sources during the TSV formation process, protecting it while allowing both device types to utilize their respective semiconductor properties
Solution Approach 2:
The patent introduces a seal layer as an intermediary protective barrier between the oxide semiconductor layer and the external environment. This seal layer prevents oxidation and contamination during the production process, particularly during TSV formation, while allowing the oxide semiconductor to maintain its semiconductor properties
2Device complexity
If TSV is formed to interconnect silicon FET and OSFET, then device integration is achieved, but the OSFET is affected by TSV formation process
Solution Approach 1:
The patent segments the device structure into two separate surfaces: the first surface for silicon FET and TSV formation, and the second surface for OSFET formation. This spatial segmentation allows TSV to be formed without affecting the OSFET, while still achieving integration through the substrate
Solution Approach 2:
The patent utilizes the third dimension (depth/substrate thickness) to resolve the conflict. By forming TSV through the substrate from one surface while forming OSFET on the opposite surface, the patent achieves vertical integration without lateral interference, effectively using dimensional separation to protect the OSFET
3Manufacturing precision
If multi-annealing process is applied to reduce diffused mist and hydrogen, then the insulating layer quality improves, but the production process complexity increases
Solution Approach 1:
The patent applies annealing treatment to the insulating layer before forming the oxide semiconductor layer and again after OSFET formation. This preliminary and sequential annealing removes diffused mist and hydrogen in advance, preventing contamination of the sensitive oxide semiconductor material while maintaining a structured production flow
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively blocks out-diffused mist and hydrogen, preventing damage to the OSFET and improving the elemental quality and performance of the semiconductor device by isolating the OSFET from the TSV formation and maintaining better device performance.
Implementation Method 1
a first annealing process is performed to form a seal layer covering the second transistor
Data Source
AI summary
A method of forming a semiconductor device includes following steps. Firstly, a first transistor is formed on a first surface of a substrate. Next, a thinning process is performed on the second surface of the substrate which is opposite to the first surface, to form a third surface. Then, a second transistor is formed on the third surface, in which the second transistor and the first transistor are electrically connected to each other through a through-silicon via penetrating through the first surface and the third surface.