1T OTP Anti-Fuse Bitcell Layout for Lower Read Voltage
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Solution Overview
Problem
One-transistor (1T) one-time programmable (OTP) anti-fuse bitcells face challenges with high voltage thresholds, which limit their operational range and reliability, especially in applications requiring low voltage operations, such as in liquid crystal display drivers and micro-electromechanical system controllers, leading to a small operating window and potential damage during read operations.
Innovation Solution
The implementation of a multi-finger diffusion region in the 1T OTP anti-fuse bitcell, where the diffusion region is split into multiple sub-regions, reduces the voltage threshold by allowing a lower voltage read operation, achieved by forming slots in the diffusion region to create narrower sub-regions that can be shorted to a thin gate oxide region, enabling a permanent low resistance filament formation during programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single gate with thick gate oxide is used in 1T OTP anti-fuse bitcell, then the device structure is simple and manufacturing is easier, but the voltage threshold is high which limits operational range and reliability
Solution Approach 1:
The gate oxide region is segmented into two distinct thickness regions: a first gate oxide region with thinner thickness and a second gate oxide region with thicker thickness. This segmentation allows the bitcell to have different voltage thresholds for different operations, enabling low voltage read operations while maintaining the ability to program at higher voltages.
Solution Approach 2:
Different regions of the gate oxide are assigned different thicknesses to perform different functions. The thinner first gate oxide region is positioned to enable low voltage read operations, while the thicker second gate oxide region provides protection and enables programming at higher voltages. This local differentiation of quality resolves the contradiction between simple structure and operational reliability.
2Ease of operation
If high voltage is applied for read operations in 1T OTP anti-fuse bitcell, then the read operation can be performed, but the device may be damaged and the operating window is small
Solution Approach 1:
The gate oxide is segmented into thickness regions that separate the read and program voltage requirements. The thinner first gate oxide region allows read operations at lower voltages, eliminating the need to apply high voltages during reads and thus preventing device damage while maintaining read capability.
Solution Approach 2:
The thicker second gate oxide region acts as a protective cushion that prevents device damage during high voltage programming operations. This pre-designed thicker region absorbs the stress of high voltage operations, allowing the device to withstand programming voltages without damage while enabling low voltage reads.
3Reliability
If the diffusion region is split into multiple sub-regions with slots, then the voltage threshold is reduced enabling low voltage operations, but the device structure becomes more complex
Solution Approach 1:
The diffusion region is segmented into multiple sub-regions separated by slots, with each sub-region having different widths. This segmentation creates multiple conduction paths with different resistance characteristics, enabling the device to operate at lower voltages by providing alternative current paths while maintaining the ability to program at higher voltages.
Solution Approach 2:
Different sub-regions of the diffusion region are assigned different widths to create local variations in electrical characteristics. Narrower sub-regions provide higher resistance paths for low voltage read operations, while wider sub-regions provide lower resistance paths for high voltage programming, resolving the contradiction between low voltage operation and structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the voltage threshold required for read operations, enhancing the reliability and operational range of 1T OTP anti-fuse bitcells, allowing them to function effectively at lower voltages without damage, thus addressing the limitations of high voltage thresholds and improving low voltage read capabilities.
Implementation Method 1
The 1T OTP anti-fuse bitcell can be programmed by an application of a voltage sufficient to cause a rupture in the thin gate oxide region
Data Source
AI summary
A one-transistor (1T) one-time programmable (OTP) anti-fuse bitcell is provided. The 1T OTP anti-fuse bitcell includes a gate, a diffusion region including at least two sub-regions, and a gate oxide region located between the gate and the diffusion region, the gate oxide region including a thin gate oxide region and a thick gate oxide region.