OTP Bit Cell Structure with Segmented Heavily Doped Channel
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
One-time-programmable (OTP) memory elements in integrated circuits suffer from mediocre reliability and lower programming yield compared to flash memory, making them less desirable for high-density applications.
Innovation Solution
A bit cell structure with a heavily doped channel region and specific channel shape is introduced, which includes a substrate with doped regions connected to source and bit lines, and a word line controlling the channel region to achieve reliable one-time-programming without additional processing steps, utilizing antifuse programming to create a permanent short-circuit for data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flash memory is used to provide non-volatile memory in ICs, then storage capacity and reliability are improved, but manufacturing complexity and cost increase due to extra processing steps
Solution Approach 1:
The invention extracts the antifuse structure from the transistor fabrication process by using a separate salicide formation step specifically for the antifuse channel region. This allows the OTP memory element to be created without requiring the full flash memory processing sequence, thereby maintaining reliability while reducing manufacturing complexity.
Solution Approach 2:
The bit cell is segmented into distinct functional regions: a transistor portion with source, drain, and channel, and a separate antifuse portion with its own doped channel region. This segmentation allows each region to be optimized independently and processed through tailored fabrication steps, improving reliability without requiring complete re-processing of the entire memory structure.
2Quantity of substance
If high-density OTP memory is used, then storage capacity is improved, but reliability and programming yield deteriorate
Solution Approach 1:
The antifuse channel region is given locally distinct properties through heavy doping specifically in that region, while the transistor channel maintains its own doping profile. This local quality differentiation ensures that the antifuse breakdown occurs at the desired location with high precision, improving programming yield in high-density configurations where precise control is critical.
Solution Approach 2:
The invention changes the doping parameter of the antifuse channel region to be heavily doped, which lowers the breakdown voltage and improves programming reliability. This parameter change allows for more controlled and reliable one-time programming even in high-density arrays where process variations can significantly impact yield.
3Reliability
If antifuse programming is used to create permanent short-circuit, then data storage reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The antifuse channel region is pre-doped heavily during the fabrication process before the actual programming step. This preliminary action ensures that when programming occurs, the breakdown happens at a predictable and controlled voltage level, reducing the precision requirements during the actual programming operation while maintaining high data storage reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed bit cell structure enhances the reliability and yield of OTP memory by allowing for efficient programming with improved electrical performance, maintaining compatibility with CMOS logic processes and avoiding the need for extra processing steps, thus overcoming the limitations of existing OTP memory.
Implementation Method 1
a heavily doped channel region in the substrate and connected with the first doped region and the source of second doped region
Implementation Method 2
a word line traversing over the second doped region and between the source and the drain
Implementation Method 3
a doped channel region in the substrate, wherein the doped channel region is provided with a first part and a second part connecting respectively to the first doped region and the source of second doped region
Data Source
AI summary
A bit cell structure for one-time-programming is provided in the present invention, including a first doped region in a substrate and electrically connected to a source line, a second doped region in the substrate and provided with a source and a drain, wherein the drain is electrically connected with a bit line, a doped channel region in the substrate with a first part and a second part connecting respectively to the first doped region and the source of second doped region in a first direction, and a width of the first part in a second direction perpendicular to the first direction is less than a width of the second part and less than a width of the first doped region, and a word line traversing over the second doped region and between the source and drain.