OTP Memory Bitcell Security via Dual Programming

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Solution Overview

Problem

One-time programmable (OTP) elements, such as electrical fuses, used for secure storage like security keys, can be reverse-engineered due to distinguishable programmed and unprogrammed states through analysis like Scanning Electron Microscopy, compromising security.

Innovation Solution

A bitcell design utilizing two OTP elements with different programming conditions to achieve distinct resistance levels, making the logic state visually indistinguishable even after programming, ensuring secure storage by using different sets of programming conditions to achieve varying degrees of programming in OTP elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrical fuses are used for secure storage, then security keys can be stored, but the programmed and unprogrammed states can be easily distinguished using SEM analysis, compromising security

Engineering Contradiction:
ImprovesecurityVSAvoidvisual distinguishability
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent changes the electrical parameters (resistance values) of OTP elements by applying different programming conditions (different currents or voltages) to create distinct resistance states that are not visually distinguishable. This allows the logic state to be stored electrically while maintaining visual indistinguishability, resolving the security vulnerability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the traditional mechanical/visual fuse break mechanism with an electrical resistance-based storage mechanism. Instead of relying on physical discontinuity that is visible under SEM, the invention uses controllable electrical resistance states that can be tuned to be visually indistinguishable while maintaining distinct electrical characteristics for logic storage.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Loss of information

If different programming conditions are applied to OTP elements, then distinct resistance levels are achieved for logic state storage, but the programming process becomes more complex

Engineering Contradiction:
Improvelogic state storage securityVSAvoidprogramming process complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent segments the programming process into distinct phases or conditions, applying different programming parameters to different OTP elements within a bitcell. This segmentation allows controlled creation of distinct resistance states while managing complexity through structured programming sequences.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by giving different programming conditions to different OTP elements based on their required logic state. Each OTP element receives tailored programming parameters (current magnitude, pulse duration, voltage level) appropriate to its intended resistance state, enabling precise control while maintaining overall system manageability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances security by making it impossible to visually determine the logic state stored in the bitcell, even with advanced analysis, thus protecting the stored values from reverse-engineering.

Implementation Method 1

the first set of conditions and the second set of conditions are for causing electromigration

Methodology Applied
Scientific EffectElectromigration:

Data Source

PatentUS10127998B2Memory having one time programmable (OTP) elements and a method of programming the memory
Publication Date: 2018.11.13 NXP USA INC
  • US10127998B2 patent drawing
  • US10127998B2 patent drawing
  • US10127998B2 patent drawing

AI summary

A method of programming a memory includes selecting a logic state for programming a first bitcell of the memory. A first one-time-programmable (OTP) element of the first bitcell is programmed using a first set of conditions intended to achieve a first target resistance in accordance with the selected logic state which results in a first degree of programming of the first OTP element. A second OTP element of the first bitcell is programmed using a second set of conditions different from the first set of conditions intended to achieve a second target resistance in accordance with the selected logic state which results in a second degree of programming of the second OTP element, wherein the first and second degrees of programming are visually indistinguishable.