OTP Memory Emulating MTP via CAM Address Tracking
Solution Overview
Problem
Conventional One-Time Programmable (OTP) memories are inefficient and costly when used to emulate Multiple-Time Programmable (MTP) memories, as they require replication of OTP memory arrays and result in wasteful data utilization, with 99% of capacity unused when programming the same data at different addresses.
Innovation Solution
Implementing an OTP-for-MTP memory system that includes an OTP data memory, an OTP Content Addressable Memory (CAM) for address storage and search, and a valid-bit memory to manage new entries and update them in a predetermined order, allowing data to be programmed and read multiple times without fixed compartments until memory capacity is reached.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If OTP memory arrays are replicated multiple times to enable MTP functionality, then the memory can be programmed multiple times, but the memory size and cost increase proportionately
Solution Approach 1:
The patent divides the memory system into three functional segments: an OTP data memory for storing actual data, an OTP address memory for storing address information, and a valid-bit memory for tracking programming status. This segmentation allows a single OTP array to serve multiple programming cycles by managing addresses and validity states separately, eliminating the need to replicate the entire memory array for each programming instance.
Solution Approach 2:
The patent introduces an intermediary address management mechanism using OTP address memory and valid-bit memory that mediates between the input data and the OTP data memory. This intermediary layer enables multiple programming operations by managing address allocation and tracking which addresses have been programmed, allowing the system to handle multiple programming cycles without replicating the data storage array.
2Adaptability or versatility
If OTP memory is used to emulate MTP memory with multiple programming cycles, then multiple programming is enabled, but data utilization efficiency drops to 1% with 99% capacity wasted
Solution Approach 1:
The patent implements dynamic address management where the OTP address memory and valid-bit memory are updated with each programming cycle. The system dynamically tracks which addresses have been programmed and manages the programming sequence, allowing efficient utilization of the OTP data memory capacity across multiple programming operations rather than wasting capacity on fixed compartmentalization.
Solution Approach 2:
The valid-bit memory provides feedback information about the programming status of each address, enabling the system to track and manage programmed addresses efficiently. This feedback mechanism allows the system to optimize data utilization by knowing which addresses are available and which have been programmed, preventing waste of memory capacity.
3Device complexity
If conventional OTP-for-MTP memory uses fixed compartments for each programming instance, then programming structure is simplified, but memory capacity is wasted when only one address is programmed multiple times
Solution Approach 1:
The patent creates a universal address management system where the OTP address memory and valid-bit memory serve all programming operations regardless of which specific addresses are programmed. This multi-functional approach allows the same memory structure to handle any programming pattern (single address multiple times, multiple addresses once, etc.) without requiring fixed compartments, maximizing the utilization of available memory capacity.
Data Source
AI summary
Techniques, systems and circuitry for using One-Time Programmable (OTP) memories to function as a Multiple-Time Programmable (MTP) memory. The OTP-for-MTP memory can include at least one OTP data memory to store data, and at least one OTP CAM to store addresses and to search input address through valid entries of the OTP CAM to find a latest entry of the matched valid addresses. The OTP-for-MTP memory can also include a valid-bit memory to find a next available entry of the OTP data memory and OTP CAM. When programming the OTP-for-MTP memory, address and data can be both programmed into the next available entry of the OTP CAM and the OTP data memory, respectively. When reading the OTP-for-MTP memory, the input address can be used to compare with valid entries of the addresses stored in the OTP CAM so that the latest entry of the matched valid addresses can be output.