OTP Memory Check Pattern Bits for Post-Boot Security
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing OTP memory technologies lack robust protection against attacks that occur after boot-up, as they primarily rely on power-on security features and do not effectively prevent data manipulation once the chip is running.
Innovation Solution
Incorporating check pattern bits within each word of the OTP memory, allowing for continuous verification of secure data integrity by comparing read-out bits to a preprogrammed pattern, and using sense amplifiers to detect errors, ensuring that attacks affecting control signals or voltages will first impact the check pattern, making it difficult to read secure data without detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If check pattern rows are only verified during power-on, then the verification process is simple and fast, but security protection is limited to boot-up only and does not cover real-time operations
Solution Approach 1:
The check pattern is pre-programmed into the OTP memory during manufacturing, embedded within the same words as secure data. This preliminary action enables continuous verification capability without adding complex external verification circuits, as the check pattern is already integrated and ready for comparison at any time during operation
Solution Approach 2:
The check pattern bits embedded within OTP words serve as an intermediary verification mechanism. When secure data is read, the accompanying check pattern bits act as a mediator that can be compared against stored reference patterns to detect tampering, enabling continuous security verification without requiring separate verification pathways
2Reliability
If check pattern bits are embedded within each word of OTP memory, then continuous verification during operation is enabled, but the memory structure becomes more complex
Solution Approach 1:
The check pattern bits are merged with secure data bits within the same OTP memory words. Each word contains both secure data bits and check pattern bits, combining verification functionality with data storage. This merging eliminates the need for separate verification memory structures and enables continuous verification during normal data access operations
Solution Approach 2:
The OTP memory structure is designed to serve multiple functions simultaneously: storing secure data, storing check patterns, and enabling verification. The same memory array and read circuitry used for accessing secure data are also used to read and verify check pattern bits, making the verification system universal and eliminating dedicated verification hardware
3Reliability
If secure data and check pattern are stored in the same words, then verification can occur during any data access, but the amount of data to be read and processed increases
Solution Approach 1:
The verification process uses partial action by only comparing the check pattern bits portion of each word against the reference pattern, rather than verifying entire words. This selective verification of specific bits within words reduces processing overhead while maintaining security, as only the check pattern portions need comparison operations
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A method includes: reading a plurality of words from a one-time program (OTP) memory of a processing chip, wherein each of the words includes secure data for the chip and bits corresponding to a check pattern; comparing the bits corresponding to the check pattern to a preprogrammed check pattern; detecting an error based on comparing the bits corresponding to the check pattern to the preprogrammed check pattern; and performing an action by the processing chip in response to detecting the error.