OTP Memory Chip Fingerprint Generation
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Solution Overview
Problem
Existing SRAM-based PUF schemes for chip fingerprinting face challenges such as variable SRAM module sizes, external factor influences, and aging effects, leading to complexity, cost, and waste in chip design and production, with uncontrollable and unreliable chip fingerprint generation.
Innovation Solution
A chip fingerprint management device utilizing a one-time programmable (OTP) memory with a hardware-readable and software-restricted storage region, where an OTP controller generates and programs a chip fingerprint based on a random number, reducing complexity and enhancing security and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SRAM-based PUF scheme is used for chip fingerprint, then chip fingerprint can be generated, but chip area is wasted due to redundant SRAM units
Solution Approach 1:
The patent extracts the essential function of fingerprint generation from the complex SRAM-based PUF system and implements it using a compact hash circuit that processes external random inputs, eliminating the need for large redundant SRAM modules while maintaining fingerprint generation capability
Solution Approach 2:
The hash circuit designed in this patent serves multiple functions: it processes random inputs to generate fingerprints, provides authentication capability, and ensures security through one-time programming, replacing multiple specialized components with a single multi-functional unit that reduces overall chip area
2Reliability
If SRAM-based PUF scheme is used for chip fingerprint, then chip fingerprint can be generated, but device complexity increases due to ECC circuit and read-out circuits
Solution Approach 1:
The patent removes the complex ECC correction circuits and sophisticated read-out circuits from the fingerprint generation system by using a hash-based approach that naturally produces stable fingerprints from random inputs without requiring error correction mechanisms
Solution Approach 2:
The patent replaces the mechanical/SRAM-based PUF system with complex read-out circuits with a software-based hash function that processes random data, substituting hardware complexity with algorithmic simplicity while maintaining fingerprint stability
3Reliability
If SRAM-based PUF scheme is used for chip fingerprint, then chip fingerprint can be generated, but design and production costs increase
Solution Approach 1:
The patent uses inexpensive hash circuit components and standard logic gates instead of expensive SRAM modules, accepting that the fingerprint is generated once during manufacturing and then read indefinitely without degradation, eliminating the need for costly redundant units and error correction infrastructure
4Reliability
If strict testing and screening procedures are performed, then chip fingerprint stability can be ensured, but productivity decreases
Solution Approach 1:
The patent performs fingerprint generation and validation as a preliminary one-time action during chip manufacturing, storing the result in non-volatile memory for indefinite use without requiring repeated testing, thereby ensuring stability while maintaining high production throughput
Data Source
AI summary
A chip fingerprint management device includes: a one-time programmable (OTP) memory including a first storage region, the first storage region being readable by hardware and access restricted by software; and an OTP controller which generates a chip fingerprint based on a random number, and programs the generated chip fingerprint into the first storage region in the OTP memory.