P+/N Well Diode Heat Sink for OTP Cell Programming
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Solution Overview
Problem
Conventional programmable resistive memory devices, such as those using electrical fuses and phase change materials, face challenges in reducing cell size and cost due to the need for large program selectors and complex fabrication processes, which hinder their integration in various applications.
Innovation Solution
The use of P+/N well junction diodes as program selectors in standard CMOS logic processes, allowing for the construction of smaller and more cost-effective programmable resistive memory cells without additional processing steps, by leveraging existing CMOS infrastructure and isolating active regions using techniques like STI, LOCOS, or Silicide Block Layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional program selectors are used in programmable resistive memory devices, then programming capability is achieved, but cell size becomes large and fabrication complexity increases
Solution Approach 1:
The patent merges the program selector function with the OTP element structure by integrating the P+/N well junction diode directly into the memory cell. This consolidation eliminates the need for separate large-area program selector components, thereby reducing overall cell size while maintaining programming capability through the diode's inherent switching characteristics
Solution Approach 2:
The P+/N well junction diode serves multiple functions within the memory cell: it acts as the program selector, provides thermal management through its heat sink integration, and enables programming through its diode characteristics. This multi-functionality eliminates the need for separate dedicated program selector components, reducing cell complexity and area
2Ease of manufacture
If conventional program selectors are used in programmable resistive memory devices, then programming capability is achieved, but device cost increases
Solution Approach 1:
The P+/N well junction diode utilizes the existing CMOS well infrastructure to provide its own structural support and thermal management capabilities. The N well serves as both the diode substrate and an integrated heat sink, eliminating the need for additional dedicated heat dissipation structures and reducing overall fabrication complexity and cost
Solution Approach 2:
The patent changes the programming approach by utilizing the diode's natural forward bias characteristics rather than requiring complex external control circuits. By applying voltage across the P+/N well junction, the diode naturally conducts current to program the OTP element, simplifying the control mechanism and reducing device complexity
3Temperature
If heat is generated during programming, then programming function is achieved, but thermal management becomes challenging
Solution Approach 1:
The N well acts as a thermal intermediary between the OTP element and the substrate. It provides a dedicated thermal conduction path that efficiently transfers heat away from the programming region, preventing excessive temperature buildup while maintaining electrical functionality during the programming process
Solution Approach 2:
The patent utilizes the thermal properties of the P+/N well junction diode structure to manage heat during programming. The diode's physical structure and material composition are designed to facilitate heat dissipation through controlled thermal conduction, ensuring reliable programming operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of smaller, more affordable programmable resistive memory cells that can be integrated into various applications, reducing cell size and fabrication costs while maintaining efficient programming capabilities.
Implementation Method 1
When a high current flows through an OTP element by turning on a program selector, the OTP element can be programmed, or burned into a high or low resistance state
Implementation Method 2
at least one thermally conductive element, coupled to the OTP element, to dissipate or generate heat
Data Source
AI summary
Junction diodes fabricated in standard CMOS logic processes can be used as program selectors with at least one heat sink or heater to assist programming for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The heat sink can be at least one thin oxide area, extended OTP element area, or other conductors coupled to the OTP element to assist programming. A heater can be at least one high resistance area such as an unsilicided polysilicon, unsilicided active region, contact, via, or combined in serial, or interconnect to generate heat to assist programming. The OTP device has at least one OTP element coupled to at least one diode in a memory cell. The diode can be constructed by P+ and N+ active regions in a CMOS N well, or on an isolated active region as the P and N terminals of the diode. The isolation between P+ and the N+ active regions of the diode in a cell or between cells can be provided by dummy MOS gate, SBL, or STI/LOCOS isolations. The OTP element can be polysilicon, silicided polysilicon, silicide, polymetal, metal, metal alloy, local interconnect, metal-0, thermally isolated active region, CMOS gate, or combination thereof.