One-Time Programmable Fuse Array for FPGA Key Storage

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Solution Overview

Problem

Existing methods for protecting configuration bitstreams in Field Programmable Gate Arrays (FPGAs) are inadequate, as encryption keys can be erased or modified, allowing unauthorized reconfiguration of devices, particularly in critical functions like network security.

Innovation Solution

The solution involves storing encoding keys in a fuse array or memory array, where the key is either blown or written in a way that prevents further modification or erasure, and the write enable signal is permanently disabled to prevent alteration, ensuring the key remains secure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If encryption is used to protect configuration bitstreams, then security is improved, but the encryption keys can still be erased or modified allowing unauthorized reconfiguration

Engineering Contradiction:
ImprovesecurityVSAvoidkey modification capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the key storage function from the main configuration memory by using a separate fuse array. This physical separation ensures that the encryption key is stored independently and cannot be modified through normal configuration operations, resolving the contradiction between security and key modification capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by pre-programming the encryption key into the fuse array during manufacturing. The fuses are blown in specific patterns to encode the key before the device is deployed, making the key immutable and preventing any later modification attempts.

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If fuses are used to store encryption keys, then key immutability is improved, but device complexity increases

Engineering Contradiction:
Improvekey immutabilityVSAvoidstorage structure complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent uses a simplified approach by copying the key directly into the fuse array structure during manufacturing. Rather than implementing complex write-protection logic or multiple storage layers, the solution copies the key once into the immutable fuse medium, achieving key immutability with minimal added complexity.

Inventive Principle:
Principle #26Copying

3Reliability

If write enable signals are permanently disabled, then key protection is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvekey protectionVSAvoidwrite enable disable precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by permanently disabling the write enable signal path during the manufacturing process itself. The write enable functionality is removed or disabled before the device leaves the factory, ensuring that no field modifications can occur while avoiding the need for complex runtime protection mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7818584B1One-time programmable memories for key storage
Publication Date: 2010.10.19 ALTERA CORP
  • US7818584B1 patent drawing
  • US7818584B1 patent drawing
  • US7818584B1 patent drawing

AI summary

Circuits, methods, and apparatus that store and prevent modification or erasure of stored encoding keys, serial identification numbers, or other information. An encoding key stored with an embodiment of the present invention may be used to decode a configuration bitstream on an integrated circuit, such as an FPGA. A serial number may be used to track or authenticate an integrated circuit. Embodiments of the present invention store this information in a memory such as an SRAM, DRAM, EPROM, EEPROM, flash, fuse array, or other type of memory. In order to prevent its erasure or modification, write enable circuitry for the memory is then permanently disabled, and if the memory is volatile, a continuous power supply is provided. Further refinements verify that the write enable circuitry has been disabled before allowing the device to be configured or to be operable.