Integrated Circuit Identifier Generation with OTP Error Detection

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Solution Overview

Problem

Integrated circuits lack an effective method to generate and validate unique identifiers that are resistant to replication and errors, which is crucial for secure authentication and trust establishment.

Innovation Solution

An integrated circuit design incorporating a one-time programmable memory, an identifier generation circuit, and a memory controller that generates a random number, calculates its weight, and performs error-detection-code encoding to create a unique identifier, ensuring the identifier is written into OTP memory only when within a specific weight range, and later verifies the identifier's correctness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error-detection-code encoding is performed on random numbers to generate unique identifiers, then authentication security is improved, but device complexity increases due to additional circuits

Engineering Contradiction:
Improveauthentication securityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the error-detection-code encoding function with the existing random number generation circuit and identifier storage circuit. The weight calculation unit and error-detection encoding unit are integrated into the identifier generation flow, allowing security enhancement without requiring completely separate security modules. This merging approach improves authentication security while minimizing the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If weight calculation and range inspection are performed on random numbers, then identifier quality is improved, but processing time increases

Engineering Contradiction:
Improveidentifier qualityVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs weight calculation and range inspection as preliminary actions during the identifier generation phase, before the identifier is stored or used for authentication. By completing these quality checks upfront during manufacturing or initialization, the system ensures high identifier quality without adding time overhead during operational authentication processes. The weight counter and range inspection unit evaluate random numbers immediately upon generation, filtering out unsuitable values before final identifier creation.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If error-detection codes are written into OTP memory, then error correction capability is improved, but manufacturing yield decreases due to stricter validation

Engineering Contradiction:
Improveerror correction capabilityVSAvoidmanufacturing yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the parameter of random number selection by introducing weight-based filtering and range inspection. Instead of using any generated random number, the system calculates the weight (number of set bits) and compares it against a predetermined range. This parameter change ensures that only random numbers with suitable error-detection properties are encoded and stored, improving error correction capability while maintaining a balance in manufacturing yield through controlled parameter selection.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12119073B2Integrated circuit and operation method and inspection method thereof
Publication Date: 2024.10.15 ASPEED TECH
  • US12119073B2 patent drawing
  • US12119073B2 patent drawing
  • US12119073B2 patent drawing

AI summary

The disclosure provides an integrated circuit and an operation method and an inspection method thereof. The integrated circuit includes a one-time programmable (OTP) memory, an identifier generation circuit, and a memory controller. The identifier generation circuit generates a random number, and performs an error-detection-code encoding operation on the random number to generate an identifier with an error-detection code. The memory controller writes the identifier generated by the identifier generation circuit into the OTP memory. The identifier generation circuit reads the identifier from the OTP memory through the memory controller, and performs an error-detection-code decoding operation on the identifier provided by the memory controller to determine whether an error of the identifier from the OTP memory is correctable. When it is determined that the error of the identifier from the OTP memory is not correctable, the writing of the identifier is deemed failed.