3T OTP Memory Cell Using Channel Current Readout

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Solution Overview

Problem

One-time programmable (OTP) memory devices face challenges in accurately reading data due to soft breakdown conditions in antifuse-based designs, requiring complex sensing amplifiers to differentiate leakage currents, which complicates the sensing process.

Innovation Solution

A three-transistor (3T) OTP memory unit cell design that utilizes a read select transistor, a data storage transistor, and a program select transistor, with distinct gate dielectric layers and vertical PN junctions, allowing for channel current-based read operations instead of ruptured or unruptured dielectric leakage current, enabling consistent '1' and '0' bit currents without relying on dielectric rupture sensing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If antifuse-based OTP memory design is used, then one-time programmability is achieved, but reading accuracy deteriorates due to soft breakdown conditions requiring complex sensing amplifiers

Engineering Contradiction:
Improvereading accuracyVSAvoidsensing amplifier complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the sensing function from a separate complex sensing amplifier and integrates it directly into the memory cell structure through the shared source region. The read select transistor's source region serves dual purposes: as the source for the read select transistor and as the sensing node that directly detects the leakage current state of the antifuse, eliminating the need for external sensing amplifiers.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the read select transistor and the sensing function into a single integrated structure. The source region of the read select transistor is shared with the antifuse structure, combining the selection function and the sensing function in one component, thereby simplifying the overall memory cell design while maintaining reading accuracy.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If soft breakdown condition is used in antifuse, then programmability is maintained, but leakage current becomes too small for accurate sensing

Engineering Contradiction:
ImproveprogrammabilityVSAvoidleakage current sensing precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The invention creates an equipotential sensing arrangement where the shared source region is held at a fixed potential reference. By connecting the source region to a stable voltage reference (ground or fixed potential node), the small leakage currents from soft breakdown antifuses can be accurately detected without being overwhelmed by potential differences or noise, enabling precise measurement of the programmed state.

Inventive Principle:
Principle #12Equipotentiality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design simplifies the read operation by using transistor 'on' and 'off' currents, reducing variability and eliminating the need for complex sensing amplifiers, thereby enhancing the reliability and efficiency of OTP memory devices.

Implementation Method 1

When programmed, the antifuse becomes conductive. To program an antifuse, a dielectric layer such as an oxide is subjected to a high electric field to cause dielectric breakdown or oxide rupture.

Methodology Applied
Scientific EffectDielectric breakdown: Avalanche Breakdown

Implementation Method 2

allowing for channel current-based read operations instead of ruptured or unruptured dielectric leakage current

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20230413540A1One-time programmable memory unit cell
Publication Date: 2023.12.21 HEFECHIP CORP LTD
  • US20230413540A1 patent drawing
  • US20230413540A1 patent drawing
  • US20230413540A1 patent drawing

AI summary

A one-time programmable memory unit cell includes a substrate comprising thereon a first active area and a second active area isolated from the first active area, a read select transistor disposed on the first active area, a data storage transistor disposed on the first active area and serially connected to the read select transistor, and a program select transistor disposed on the second active area. During read operation, the state “1” bit current is the transistor “on” current, while the state “0” bit current is the transistor “off” current.