OTP Memory Fuse Address Generation Circuit for Defective Cell Repair

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Solution Overview

Problem

The existing semiconductor technologies face inefficiencies in detecting and repairing defective memory cells, particularly due to the time-consuming process of scanning available fuses in One-Time Programmable (OTP) memory circuits, which increases test time for semiconductor apparatuses.

Innovation Solution

The implementation of a fuse array with a fuse address generation circuit that efficiently searches for available fuse sets within specific regions, allowing for rapid identification and programming of defective addresses, and a data control circuit that outputs corrected fuse data based on comparisons, thereby reducing test time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all regions of the OTP memory circuit are scanned to detect available fuses, then the defective address can be programmed into an available fuse, but the test time for the semiconductor apparatus increases

Engineering Contradiction:

Improvedefective address detection accuracyVSAvoidtest time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The fuse array is divided into multiple regions, and the defective address is used to directly identify the region containing the available fuse. This segmentation allows the test circuit to avoid scanning all regions and directly access the relevant region, significantly reducing test time while maintaining accurate defective address detection.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The fuse array is pre-organized into multiple regions with each region storing fuse data for specific address ranges. This preliminary organization of fuse data by region allows the test circuit to quickly locate the appropriate region using the defective address as an index, eliminating the need for exhaustive scanning of all fuse regions.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If the fuse array is divided into multiple regions with region identifiers, then the search for available fuses becomes more efficient, but the device complexity increases

Engineering Contradiction:

Improvefuse search speedVSAvoidfuse array structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The region identifier mechanism serves multiple functions: it organizes fuse data by address range, enables direct region selection based on defective addresses, and facilitates efficient available fuse detection. This multi-functional approach improves productivity without proportionally increasing device complexity, as the same regional structure supports both data organization and search optimization.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS11328787B2One-time programmable memory circuit and semiconductor apparatus including the same

Publication Date: 2022.05.10 SK HYNIX INC

AI summary

In one embodiment of the present disclosure, an OTP memory circuit may include: a fuse array configured to output fuse data of a fuse set corresponding to a fuse address among a plurality of fuse sets; and a fuse address generation circuit configured to generate the fuse address to search for an available fuse set within a particular region, corresponding to a defective address, among a plurality of regions of the fuse array.