Integrated OTP Memory Emulating MTP via Block Mapping
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Solution Overview
Problem
Conventional methods for implementing pseudo-MTP memory using OTP memory are overly complex and inefficient due to high system overhead in tracking program counts and generating proper addresses, making them undesirable for practical use.
Innovation Solution
An integrated pseudo-MTP memory system utilizing a non-volatile register to store program count and block size information, allowing for efficient address mapping and configuration of OTP memory blocks to emulate MTP functionality with minimal system overhead, by updating the count register for each programming round and generating proper addresses based on the latest program count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional control system is used to track program counts and generate addresses for pseudo-MTP memory, then the memory can be programmed multiple times, but the system overhead becomes too high and complexity increases
Solution Approach 1:
The patent merges the control system functionality directly into the OTP memory array by integrating block selection logic and address mapping within the memory structure itself. This eliminates the need for external control systems to track program counts and generate addresses, thereby reducing system overhead while maintaining multiple-time programmability through the use of multiple OTP blocks that can be sequentially programmed.
Solution Approach 2:
The OTP memory array is designed to automatically manage its own programming cycles by using the address input to directly select which block to program based on the inherent structure of the memory array. The system serves itself by using the address lines to implicitly track which block is being programmed, eliminating the need for external counters or control logic to manage program counts.
2Adaptability or versatility
If a conventional control system is used to track program counts and generate addresses, then multiple programming cycles are enabled, but the overhead makes pseudo-MTP ineffective and costly
Solution Approach 1:
The patent combines address mapping and block selection functions directly into the OTP memory array structure, allowing the memory to inherently track which block should be programmed based on the address input. This integration eliminates the need for separate control systems, reducing overhead and improving ease of operation while maintaining program count tracking capability.
Solution Approach 2:
The OTP memory array is designed to serve multiple functions simultaneously: it stores data, tracks program counts through its block structure, and generates appropriate addresses for subsequent programming cycles. This multi-functionality is achieved by using the same memory structure for both data storage and control logic, thereby reducing system overhead and improving ease of operation.
Data Source
AI summary
An integrated One-Time Programmable (OTP) memory to emulate an Multiple-Time Programmable (MTP) memory with a built-in program count tracking and block address mapping is disclosed. The integrated OTP memory has at least one non-volatile block register and count register to respectively store block sizes and program counts for different block/count configurations. The count register can be programmed before each round of programming occurs to indicate a new block for access. The integrated OTP memory also can generate a block address based on values from the count and block registers. By combining the block address with the lower bits of an input address, a final address can be generated and used to access different blocks (associated with different program counts) in the OTP memory to mimic an MTP memory.