OTP Memory System Multi-Time Programmability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing multi-time programmable memory technologies require additional circuits and complex fabrication processes, leading to high fabrication costs and increased yield risks, while one-time programmable memory cells lack flexibility and are prone to programming failures.
Innovation Solution
A programmable memory system utilizing N rows of one-time programmable memory cells with an output module, judge module, and write-in module that performs calculations to determine if data needs updating, reducing the number of programming operations and minimizing memory bits required for storing correction parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multi-time programmable memory (EPROM, EEPROM, flash memory) is used to achieve repeated settings, then flexibility is improved, but device complexity and fabrication cost increase
Solution Approach 1:
The memory system is divided into multiple independent OTP memory blocks (first OTP memory block, second OTP memory block, etc.), each capable of independent programming. This segmentation allows the system to achieve multi-time programmability by selecting different blocks for different programming operations, rather than requiring a single complex MTP memory structure.
Solution Approach 2:
The patent introduces a time dimension to the programming process by enabling sequential programming of different OTP memory blocks. The control circuit manages multiple programming operations across different blocks over time, transforming the limitation of single-time programming into a multi-time capability through temporal sequencing rather than spatial complexity.
2Adaptability or versatility
If multi-time programmable memory is used to achieve repeated settings, then flexibility is improved, but fabrication yield risk increases
Solution Approach 1:
The patent employs multiple disposable OTP memory blocks that can be independently programmed and then left in their programmed state. Each block serves as a single-use storage element, avoiding the need for complex re-programmable structures. This approach prioritizes manufacturing reliability by using simple, well-established OTP technology while achieving multi-time functionality through the availability of multiple blocks.
3Adaptability or versatility
If additional record elements are added to track programmed blocks, then multi-time programmability is achieved, but device complexity increases
Solution Approach 1:
The control circuit serves multiple functions: it decodes row and column addresses, selects which OTP memory block to access, controls the programming operation, and manages data input/output. By making the control circuit universal and multi-functional, the patent avoids the need for separate dedicated circuits for each control function, thereby reducing overall device complexity while enabling multi-time programmability.
4Ease of manufacture
If OTP memory cells are used without additional circuits, then fabrication cost is reduced, but programming flexibility is limited
Solution Approach 1:
The patent merges multiple OTP memory blocks into a single unified memory system managed by a common control circuit. The row decoders, column decoders, and control logic are shared across all blocks, allowing the system to maintain the simplicity and low cost of individual OTP cells while achieving multi-time programmability through the combined capacity of multiple blocks working together under unified control.
Data Source
AI summary
A programmable memory includes N number of one-time programmable (OTP) memory rows, an output module, a judge module, and a write-in module. The output module receives all data of the OTP memory rows and generates output data. The judge module receives the output data and write-in data and generates write-in control data according to the output data and the write-in data. When a bit datum of the output data is different to a bit datum of the write-in data, the bit of the write-in control data is enabled. The write-in module receives the write-in control data and stores a preset bit datum in an unprogrammed OTP memory cell of an OTP memory row corresponding to the enabled bit.