One-Time Programmable Memory Cell Using PIN Diode
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Solution Overview
Problem
Existing one-time programmable (OTP) memory cells require two transistors, leading to a larger silicon footprint, necessitating a more compact design.
Innovation Solution
A one-time programmable memory cell is designed with a single semiconductor bar and dielectric layers, utilizing a PIN diode or resistive element to achieve breakdown and read logic states with reduced footprint, employing a breakdown potential difference and read voltage to determine the memory cell's state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional OTP memory cell uses two transistors (one for breakdown, one for reading), then the breakdown and read functions can be performed, but the silicon footprint becomes larger
Solution Approach 1:
The patent combines the breakdown transistor and read transistor into a single multi-functional transistor. The same transistor structure is used for both applying breakdown voltage and reading the memory state, eliminating the need for separate transistors and reducing silicon footprint while maintaining both functions
Solution Approach 2:
The single transistor is designed to perform multiple functions: it can be configured to apply high breakdown voltage across the dielectric layer, and subsequently configured to read the memory state by measuring current flow. This universal transistor replaces the traditional two-transistor architecture
2Area of stationary object
If a single transistor is used instead of two, then the silicon footprint is reduced, but the ability to separately perform breakdown and read operations may be compromised
Solution Approach 1:
The transistor operates in different dynamic modes depending on the operation phase. During breakdown, it is configured with specific voltage conditions to enable dielectric breakdown. During read operations, it is reconfigured with different voltage conditions to measure the memory state. This dynamic reconfiguration allows one transistor to fulfill the roles of two static transistors
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a smaller footprint OTP memory cell with efficient distinction between logic states, using a PIN diode to deliver significantly different forward currents for broken and non-broken down states, enhancing readout efficiency.
Implementation Method 1
a first logic state in the presence of a non-electrically broken down first electrically isolating region and a second logic state in the presence of an electrically broken down first electrically isolating region
Implementation Method 2
using a PIN diode to deliver significantly different forward currents for broken and non-broken down states, enhancing readout efficiency
Data Source
AI summary
A memory cell is formed by a PIN diode having three contacts. A breakdown voltage is applied to break down a gate oxide arranged between a region of the PIN diode and a substrate region. The breakdown or non-breakdown state of the gate oxide is determined by applying a read voltage between the anode and the cathode of the diode and determining the value of the corresponding current flowing in the diode.