OTP Memory Programming via Pulsed Voltage Breakdown
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Solution Overview
Problem
Conventional nonvolatile memory devices experience poor data sensing margins and reliability issues during read operations due to insufficient dielectric breakdown of the gate dielectric layer in OTP unit cells, caused by static stress and trapped electrons during programming.
Innovation Solution
A method involving pulse-type program voltages with multiple cycles, including pre-program, verify, and post-program operations, where the programming interval or voltage is adjusted based on verification results to ensure proper dielectric breakdown and minimize electron trapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high voltage VPP is continuously applied to the antifuse during programming, then the dielectric breakdown should be achieved, but electrons become trapped at the interface of the gate dielectric layer reducing electric field strength and causing programming failure
Solution Approach 1:
The patent applies periodic pulsed voltage instead of continuous voltage during programming. The program voltage VPP is applied in repeated pulses with specific width and interval, creating periodic action that prevents electron trapping while achieving dielectric breakdown. The pulse interval allows trapped electrons to be emitted, resetting the interface state for the next pulse.
Solution Approach 2:
The patent introduces dynamic control of programming parameters including pulse width, pulse interval, and number of pulses. The programming method dynamically adjusts these parameters based on verification results, transitioning from static continuous programming to dynamic adaptive programming to optimize breakdown while minimizing electron trapping.
2Manufacturing precision
If the programming voltage is increased to ensure dielectric breakdown, then the breakdown effectiveness improves, but the data sensing margin deteriorates due to electron trapping
Solution Approach 1:
The periodic pulsed programming prevents electron trapping that would otherwise reduce the sensing margin. By applying voltage in pulses with intervals, the method achieves precise dielectric breakdown without the harmful accumulation of trapped electrons, thereby maintaining both breakdown precision and sensing margin.
Solution Approach 2:
The patent implements verification operations between programming pulses and uses the verification results to control whether to continue programming. This feedback mechanism ensures that programming stops precisely when breakdown is achieved, preventing over-programming that would further degrade the sensing margin, while also ensuring adequate breakdown precision.
3Productivity
If continuous programming is performed to achieve dielectric breakdown, then the programming completeness improves, but the read operation reliability deteriorates due to trapped electrons reducing electric field strength
Solution Approach 1:
The periodic pulsed programming method achieves complete programming through repeated pulses while preventing electron trapping. Each pulse interval allows trapped electrons to be emitted, ensuring that read operation reliability is maintained even after complete programming is achieved.
Solution Approach 2:
The patent maintains continuous useful action by repeating programming pulses until verification confirms complete breakdown. The continuous repetitive pulsing ensures programming completeness while the interval between pulses continuously removes trapped electrons, preserving read operation reliability throughout the programming process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the data sensing margin and reliability of OTP unit cells by effectively breaking down the gate dielectric layer and reducing electron trapping, preventing malfunctions and improving read operation performance.
Implementation Method 1
a high electric field is formed between a substrate and the gate of the antifuse ANT_FS implemented with a MOS transistor, leading to a dielectric breakdown of the gate dielectric layer formed between the gate and the substrate
Implementation Method 2
electrons are trapped at an interface of the gate dielectric layer of the antifuse ANT_FS, and thus the electric field strength is reduced during the program operation
Data Source
AI summary
Disclosed is a method for programming a nonvolatile memory device including one time programmable unit cells. The method for programming a nonvolatile memory device including one time programmable (OTP) unit cells, the method comprising applying a pulse type program voltage having a plurality of cycles. The present invention relates to a method for programming a nonvolatile memory device, which can prevent malfunctions by enhancing a data sensing margin in a read operation through the normal dielectric breakdown of an antifuse during a program operation, and thus improve the reliability in the read operation of an OTP unit cell.