OTP Memory Access Algorithm Using XOR Bit Difference Recording
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Solution Overview
Problem
Existing OTP memory systems require an extra memory unit for addressing, limiting their functionality and increasing hardware complexity and cost due to the need for an initial address indicator to track utilized memory blocks.
Innovation Solution
A method and apparatus that compares and records data conversion between words in a OTP memory array, utilizing exclusive-OR operations to reduce the need for additional memory units and simplify the hardware circuit by only recording bit differences, allowing for multi-programmable functions without an extra initial address indicator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an initial address indicator is added to track utilized memory blocks, then memory block tracking capability is improved, but device complexity and hardware cost increase
Solution Approach 1:
The patent extracts the address tracking function from a separate initial address indicator and integrates it into the existing array decoder. The array decoder now performs dual functions: decoding row addresses and tracking which memory blocks have been utilized. This eliminates the need for a separate initial address indicator circuit while maintaining the ability to track utilized memory blocks.
Solution Approach 2:
The patent merges the address tracking function with the array decoder circuit. The array decoder is modified to include functionality for determining whether memory blocks have been initialized, combining what were previously separate functions into a single integrated circuit. This reduces the overall number of components and simplifies the hardware architecture.
2Reliability
If an initial address indicator is added to track utilized memory blocks, then memory block tracking capability is improved, but manufacturing cost increases
Solution Approach 1:
The patent removes the separate initial address indicator component and extracts its tracking functionality into the array decoder. This consolidation reduces the total component count and simplifies the manufacturing process, thereby lowering production costs while maintaining the necessary tracking capability.
Solution Approach 2:
The array decoder is designed to perform multiple functions: traditional row address decoding and the additional function of tracking utilized memory blocks. This multi-functionality eliminates the need for dedicated tracking hardware, reducing manufacturing complexity and cost.
3Device complexity
If OTP memory units are used to record bit data, then memory simplicity and cost are improved, but record count is limited by the number of memory blocks
Solution Approach 1:
The patent introduces a new dimension for increasing storage capacity by modifying the data organization structure. Instead of simply adding more memory blocks, it implements a hierarchical structure where data is organized into groups and super-groups, and utilizes a data conversion mechanism that records information in a compressed format. This allows the system to achieve higher effective record counts without proportionally increasing the physical memory block count.
Solution Approach 2:
The patent changes the parameter of data representation by implementing a data conversion mechanism. Rather than storing complete data words in each memory block, it stores converted and compressed data that requires fewer bits per block. This parameter change in data organization allows the existing memory blocks to accommodate a larger total number of records.
Data Source
AI summary
A method for performing multi-programmable function with one-time programmable (OTP) memories includes: generating a newest word in a OTP memory array; receive a word-to-be-record; comparing the newest word and the word-to-be-record; and according to a result, recording bit information between the newest word and the word-to-be-record into the OTP memory array. Therefore the method and apparatus can simplify hardware circuit and reduce production costs of additional memory units, furthermore the memory count is not limited to only OTP memory block count.