OTP MRAM Cell Breakdown Current for Data Retention
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Solution Overview
Problem
Conventional MRAM devices are not suitable for one-time-programmable (OTP) applications due to data loss during high temperature events such as solder reflow or Wafer Level Chip Scale Packaging (WLCSP), requiring additional chip space and increasing manufacturing complexity.
Innovation Solution
An OTP memory implementation using MRAM memory cells, where the OTP select transistor is configured to apply a breakdown current to the OTP MRAM cell, damaging the insulating layer and creating a low breakdown resistance state that persists even after high temperature events, effectively locking the data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MRAM devices are used, then data can be written and read, but data is lost during high temperature events such as solder reflow or WLCSP
Solution Approach 1:
The patent changes the resistance state of the MRAM cell from a reversible magnetic state to an irreversible conductive state by inducing a breakdown condition. This parameter change transforms the memory cell from volatile (losing data at high temperature) to non-volatile (retaining data permanently), resolving the contradiction between data retention and high temperature resistance
Solution Approach 2:
The patent converts the harmful effect of high temperature (which normally causes data loss in MRAM) into a beneficial programming mechanism. By deliberately inducing a breakdown condition that can only occur under specific high-stress conditions, the patent creates a permanent state change that prevents future data loss, turning a previously harmful phenomenon into the core programming mechanism
2Reliability
If additional OTP memory structures are added to prevent data loss, then data retention improves, but chip area increases
Solution Approach 1:
The patent makes the MRAM cell itself multi-functional by enabling it to operate in both conventional volatile mode and irreversible OTP mode. The same memory cell structure serves dual purposes: normal RAM operation during manufacturing and OTP storage in final product, eliminating the need for separate OTP memory structures and reducing chip area
Solution Approach 2:
The patent merges the OTP memory function directly into the MRAM cell structure by inducing a breakdown condition that permanently alters the cell's resistance. This combines what were previously separate memory technologies into a single integrated structure, achieving OTP functionality without requiring additional dedicated OTP memory arrays
3Reliability
If additional OTP memory structures are added, then data retention improves, but manufacturing complexity increases
Solution Approach 1:
The patent enables the same MRAM cell structure to serve both as volatile RAM during manufacturing processes and as irreversible OTP storage in the final product. This universal design eliminates the need for separate OTP memory arrays and their associated complex manufacturing processes, simplifying the overall fabrication workflow
Solution Approach 2:
The patent performs the OTP programming action (inducing breakdown) as a preliminary step during or after the memory array formation process. By completing the OTP programming early in the manufacturing sequence rather than requiring additional post-processing steps, the patent simplifies the manufacturing complexity while ensuring data retention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces area requirements, lowers costs, and simplifies the manufacturing process by enabling MRAM cells to function as OTP memory elements that maintain data integrity even after high temperature processes.
Implementation Method 1
the OTP select transistor is configured to selectively apply a breakdown current to the OTP MRAM cell to write the OTP MRAM cell to a breakdown state
Implementation Method 2
The two layers include a magnetic layer that is permanently magnetized in a fixed magnetic field alignment direction (this layer is referred to as a pinned layer), and a changeably-magnetized magnetic layer
Implementation Method 3
Magnetoresistive random-access memory (MRAM) is a non-volatile random access memory (RAM) technology that uses magnetic storage elements to store data
Data Source
AI summary
A memory device includes a plurality of magnetoresistive random-access memory (MRAM) cells including a first one-time programmable (OTP) MRAM cell. A first OTP select transistor is connected to the first OTP MRAM cell. The first OTP select transistor configured to selectively apply a breakdown current to the first OTP MRAM cell to write the first OTP MRAM cell to a breakdown state.