OTP Unit Cell Parallel Switching for Voltage Loss Reduction

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Solution Overview

Problem

Conventional One-Time Programmable (OTP) unit cells experience degradation in data sensing margin and read operation reliability due to the series connection of transistors in the data path, leading to voltage drop and malfunction during read operations.

Innovation Solution

The proposed solution involves a nonvolatile memory device with an anti-fuse connected between an output terminal and a ground voltage terminal, along with first and second switching units to transfer write and read voltages independently, minimizing voltage loss and improving data sensing margin by parallel connection of switching units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If transistors are connected in series in the data path, then the circuit can be simplified, but voltage drop increases and data sensing margin degrades

Engineering Contradiction:
Improvecircuit structureVSAvoiddata sensing margin
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the switching function into two separate switching units (first switching unit for write voltage, second switching unit for read voltage) instead of using a single series transistor path. This segmentation eliminates the voltage drop issue by providing dedicated parallel paths for write and read operations, resolving the contradiction between circuit simplicity and data sensing margin.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If transistors are connected in series to form the data path, then the write operation can be performed, but voltage drop occurs and read operation reliability degrades

Engineering Contradiction:
Improvewrite operation capabilityVSAvoidread operation reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements dynamic switching where the first switching unit is activated during write operations and the second switching unit is activated during read operations. This dynamic configuration allows the circuit to adapt its structure based on the operation mode, enabling write capability while ensuring read operation reliability by eliminating voltage drop during read cycles.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If a single transistor path is used for both write and read operations, then device complexity is reduced, but voltage loss increases during read operations

Engineering Contradiction:
Improveswitching unit configurationVSAvoidvoltage loss
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

Each switching unit is designed to handle specific voltage transfer tasks (write voltage transfer for the first unit, read voltage transfer for the second unit), making them universally applicable to their respective functions. This multi-functional approach allows the circuit to perform both write and read operations with dedicated optimized paths, minimizing voltage loss during read operations while maintaining overall device functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8199552B2Unit cell of nonvolatile memory device and nonvolatile memory device having the same
Publication Date: 2012.06.12 MAGNACHIP SEMICON LTD
  • US8199552B2 patent drawing
  • US8199552B2 patent drawing
  • US8199552B2 patent drawing

AI summary

A One-Time Programmable (OTP) unit cell and a nonvolatile memory device having the same are disclosed. A unit cell of a nonvolatile memory device includes: an anti-fuse connected between an output terminal and a ground voltage terminal; a first switching unit connected to the output terminal to transfer a write voltage to the output terminal; and a second switching unit connected to the output terminal to transfer a read voltage to the output terminal.