Vacancy-Terminal Antifuse Structure for OTP Memory Cells
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Solution Overview
Problem
Conventional OTP memory devices with floating terminals in antifuse transistors are prone to shorts and large leakage currents due to relaxed fabrication restrictions, compromising their functionality.
Innovation Solution
Implementing antifuse transistors with vacancy terminals instead of floating terminals by using a metal-over-diffusion layer mask that omits patterns at these terminals, thereby eliminating the risk of shorts and leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If floating terminals are used in antifuse transistors, then fabrication process is simplified, but leakage current increases
Solution Approach 1:
The patent extracts the problematic floating terminal from the antifuse transistor structure and replaces it with a vacancy terminal. This removal of the floating terminal eliminates the source of leakage current while maintaining the essential functionality of the transistor, directly resolving the contradiction between ease of manufacture and energy loss.
Solution Approach 2:
Instead of leaving the terminal floating (conventional approach) or connecting it to a fixed potential (alternative approach), the patent inverts the concept by creating a vacancy terminal that is intentionally left unconnected. This inversion resolves the leakage issue by removing the terminal rather than connecting it, achieving both manufacturing simplicity and electrical integrity.
2Device complexity
If floating terminals are used in antifuse transistors, then device structure is simplified, but reliability decreases
Solution Approach 1:
The patent extracts the floating terminal that causes reliability issues and replaces it with a vacancy terminal. This extraction eliminates the risk of shorts between the terminal and surrounding structures, directly improving reliability while maintaining structural simplicity.
Solution Approach 2:
The patent applies preliminary anti-action by proactively removing the floating terminal before it can cause any harmful effects. By eliminating the potential source of shorts in advance, the design prevents reliability issues before they can occur, rather than attempting to mitigate them after they arise.
3Ease of manufacture
If MD patterns are placed at all terminal locations, then contact structure is complete, but MD-MG short risk increases
Solution Approach 1:
The patent extracts the MD pattern from the vacancy terminal location, creating a deliberate omission in the contact structure. This extraction prevents the MD-MG short by removing the potential conductive path, while the overall contact structure remains complete for all functional terminals.
Solution Approach 2:
The patent applies local quality by differentiating the treatment of different terminal locations. While MD patterns are present at functional terminal locations for complete contact structure, they are intentionally absent at vacancy terminal locations to prevent MD-MG shorts. This localized differentiation resolves the contradiction between contact completeness and short prevention.
Data Source
AI summary
An OTP memory cell is provided. The OTP memory cell includes: an antifuse transistor, wherein a gate terminal of the antifuse transistor is connected to a first word line having a first signal, and the antifuse transistor is selectable between a first state and a second state in response to the first signal; and a selection transistor connected between the antifuse transistor and a bit line, wherein a gate terminal of the selection transistor is connected to a second word line having a second signal, and the selection transistor is configured to provide access to the antifuse transistor in response to the second signal. A first terminal of the antifuse transistor is a vacancy terminal, and a second terminal of the antifuse transistor is connected to the selection transistor.