Post-Process OTPROM via Selective Dielectric Breakdown
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices face delays and inefficiencies due to the need for hard-coded programming, which interrupts the processing timeline and requires separate fabrication processes for different customers, leading to increased costs and variability in manufacturing.
Innovation Solution
The method involves using stress voltage signals to selectively break down dielectric regions in transistors for post-processing hard-coding of program data, allowing for complete fabrication before programming, thus minimizing delays and enabling uniform processing across different customer requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hard-coded programming is performed during fabrication, then program code can be integrated into the device, but processing operations are interrupted and time-to-market is delayed
Solution Approach 1:
The patent applies preliminary action by fabricating the complete integrated circuit device including all layers and structures before performing the programming step. The programming is then done in a post-processing step using voltage application to selectively break down dielectric material, rather than interrupting the main fabrication process. This allows the device to be fully manufactured first, and programming to be completed subsequently without delaying the overall production timeline.
2Adaptability or versatility
If separate fabrication processes are used for different customers, then custom program codes can be provided, but manufacturing efficiency decreases and costs increase
Solution Approach 1:
The patent applies segmentation by separating the fabrication process from the programming process. All devices are fabricated using the same standardized process up to the point where programming layers are formed. The programming step is then segmented as a separate post-processing operation where voltage is applied to specific devices to selectively break down dielectric material in their programming layers, encoding custom program codes without requiring separate fabrication runs for each customer.
Solution Approach 2:
The patent applies universality by creating a standardized fabrication process that can produce devices for multiple customers simultaneously. The same fabrication equipment and process steps are used for all devices, and the programming capability is built into the device structure during fabrication. This allows a single fabrication line to serve multiple customers with different programming requirements, improving manufacturing efficiency while maintaining adaptability.
3Reliability
If programming is performed before completing fabrication, then program code can be hard-coded, but uniformity in process steps becomes difficult to attain
Solution Approach 1:
The patent applies preliminary action by completing all fabrication steps including the formation of programming layers with dielectric material before performing the programming operation. This ensures that all devices undergo the same fabrication process under controlled conditions, maintaining process uniformity. The programming step is then performed uniformly across all devices using standardized voltage application procedures to selectively break down the dielectric material and encode program codes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the completion of semiconductor device fabrication without interruptions, reducing time-to-market and enhancing manufacturing efficiency by enabling simultaneous production for multiple customers with disparate programming needs.
Implementation Method 1
A stress voltage signal is provided to a portion of a transistor for causing a dielectric breakdown of the portion of the transistor for hard-wiring the data
Data Source
AI summary
At least one method, apparatus and system disclosed involves hard-coding data into an integrated circuit device. An integrated circuit device provided. Data for hard-wiring information into a portion of the integrated circuit device is received. A stress voltage signal is provided to a portion of a transistor of the integrated circuit device for causing a dielectric breakdown of the portion of the transistor for hard-wiring the data.