OTS ESD Protection Diode for Low-Capacitance IC Protection

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Solution Overview

Problem

Existing ESD protection diodes in semiconductor ICs occupy significant silicon area, exhibit high capacitance, and cause leakage current, impacting device miniaturization, performance, and power consumption.

Innovation Solution

Incorporation of ovonic threshold switching (OTS) layers in ESD protection diodes, which occupy less silicon area, have low capacitance, and low leakage current, switching to a conductive state during voltage spikes to divert current away from sensitive circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional ESD protection diodes are used, then ESD protection is provided, but silicon area is significantly occupied

Engineering Contradiction:

ImproveESD protectionVSAvoidsilicon area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the electrical parameters of the protection diode by introducing an OTS layer that dramatically alters resistance characteristics. The OTS layer transitions from high resistance during normal operation to low resistance during ESD events, enabling effective protection with a smaller device footprint compared to traditional diodes.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The protection diode structure combines multiple materials including silicon, silicon nitride (OTS layer), and various dielectric materials. This composite structure leverages the unique properties of each material to achieve both compact size and effective ESD protection functionality.

Inventive Principle:

Principle #40Composite materials

2Reliability

If traditional ESD protection diodes are used, then ESD protection is provided, but capacitance is high

Engineering Contradiction:

ImproveESD protectionVSAvoidcapacitance

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The OTS layer fundamentally changes the capacitance parameter of the protection diode. By controlling the thickness and properties of the OTS layer, the patent achieves low capacitance values that minimize signal interference while maintaining robust ESD protection capabilities.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If traditional ESD protection diodes are used, then ESD protection is provided, but leakage current is significant

Engineering Contradiction:

ImproveESD protectionVSAvoidleakage current

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent changes the electrical parameter profile by introducing the OTS layer, which maintains high resistance during normal operation to minimize leakage current. The layer only transitions to low resistance when ESD voltage thresholds are exceeded, thereby providing protection while minimizing energy loss during normal device operation.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances ESD protection without occupying large silicon area, maintains signal integrity, reduces power consumption, and improves overall functionality and cost-efficiency of ICs.

Implementation Method 1

Methodology Applied

Scientific EffectOvonic threshold switching:

Data Source

PatentUS20260075956A1Electrostatic Discharge Protection Using Ovonic Threshold Switching

Publication Date: 2026.03.12 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

An electrostatic discharge (ESD) protection diode in a semiconductor integrated circuit (IC) includes a silicon wafer. The IC includes a well region within the silicon wafer. The IC includes an N+ region and a P+ region within the well region. The IC includes a gate dielectric layer on top of the silicon wafer. The IC includes a floating gate layer on top of the gate dielectric layer. The IC includes an ovonic threshold switching (OTS) layer on top of the floating gate layer. The IC includes an interlayer dielectric (ILD) on top of the OTS layer.