OTU4 Spatial Framer Demultiplexing for G.709 Optical Networks

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Solution Overview

Problem

Existing Optical Transport Networks (OTNs) face challenges in efficiently demultiplexing and reading information from lower order Optical channel Data Unit (ODU) flows, which are interleaved across multiple clock cycles, requiring significant processing resources and resulting in high latency and circuit complexity.

Innovation Solution

A method and apparatus that utilize a digital signal processor (DSP) to generate bit masks for identifying Frame Alignment Signal (FAS) data, allowing framer circuits to detect and predict FAS occurrences in lower order ODU flows within higher order ODU frames, facilitating demultiplexing and information extraction with reduced latency and gate count through spatial-domain framing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If time-domain framing is used to detect FAS data in lower order ODU flows, then frame alignment can be achieved, but processing latency and circuit complexity increase significantly

Engineering Contradiction:
Improveframe alignment accuracyVSAvoidprocessing latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent transitions from time-domain framing to spatial-domain framing by detecting FAS data across multiple parallel ODU flows simultaneously in a single clock cycle. This dimensional shift from sequential time-based detection to parallel space-based detection enables reduced latency while maintaining alignment accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the higher order ODU flow into multiple lower order ODU flows, each with its own dedicated framer circuit. This segmentation allows parallel processing of FAS detection across different ODU flows, reducing the processing time and complexity compared to sequential time-domain detection.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple framer circuits process lower order ODU flows sequentially in time-domain, then frame detection is achieved, but circuit complexity and gate count increase

Engineering Contradiction:
Improveframe detection capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements spatial-domain framing where multiple framer circuits operate in parallel across different spatial domains (different ODU flows) simultaneously. This eliminates the need for sequential time-domain processing, reducing circuit complexity and gate count while maintaining reliable frame detection.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges the frame detection functionality into a unified spatial-domain approach where multiple framer circuits share common resources and operate simultaneously. This consolidation reduces the overall circuit complexity compared to having separate sequential processing paths.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If lower order ODU flows are interleaved across multiple clock cycles, then multiplexing is achieved, but processing resources and latency increase

Engineering Contradiction:
Improvemultiplexing capabilityVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent resolves the interleaving issue by switching from time-domain to spatial-domain processing. Multiple ODU flows are processed in parallel across different spatial domains simultaneously, enabling efficient demultiplexing without the latency and resource overhead of sequential time-based processing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent performs preliminary FAS detection and frame identification in the spatial domain before actual data processing. By pre-identifying frame boundaries and alignment information across all ODU flows simultaneously, the system eliminates the need for subsequent time-based processing steps, improving overall productivity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9479849B2OTU4 one level de-multiplexing spatial framer for G.709 optical transport networks
Publication Date: 2016.10.25 INFINERA CORP
  • US9479849B2 patent drawing
  • US9479849B2 patent drawing
  • US9479849B2 patent drawing

AI summary

A method may include generating, by a device, a set of bit masks associated with locating frame alignment signal (FAS) data. The set of bit masks may be utilized by multiple framer circuits associated with identifying a start of one more frames of multiple lower order Optical channel Data Unit (ODU) flows multiplexed in a higher order ODU flow. The method may include detecting, by the device, the FAS data at a particular byte location in a particular lower order ODU flow, of the multiple lower order ODU flows, based on the set of bit masks. The method may include identifying, by the device, the start of one or more frames of the particular lower order ODU flow based on detecting the FAS data. The one or more frames may be associated with an ITU-T G.709 Optical Transport Network frame based signal.